Data link layer: services

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Presentation transcript:

CMPT 371 Data Communications and Networking Introduction to the Data Link Layer Error detection

Data link layer: services Framing Encapsulation of IP datagram to create data link frame (e.g. Ethernet frame) Link access Manage sharing of physical link between hosts Reliable delivery Reliable delivery service may be implemented over links with high error rates (not wired) Error detection and correction Methods to detect and or correct errors introduced by signal attenuation and interference Janice Regan © 2005-2013

Error detection and Correction Errors may be introduced into data during transmission. (transmission impairments, noise) These errors need to be identified Any unit (frame) of data containing an error needs to be corrected The corrupted data can be retransmitted forward error correction (FEC) can sometimes be used to correct the received data In the transport layer we are considering the transmission along one point to point connection (one direct physical connection between two hosts) Janice Regan © 2005-2013

Error detection and correction Consider a message k bits long. Append a frame check sequence (FCS) m bits long The FCS allows you to determine if there are inconsistencies that have been introduced during transmission The resulting code word is m+k bits long. This code word represents the data sequence k bits long The rate of the code is k/(n+k) message FCS k-1 k k+m-1 Janice Regan © 2005-2013

Frame Error Rate and Bit Error Rate The bit error rate, Pb , is the probability that any bit in a sequence of transmitted bits is in error when received 1-Pb is the probability that a bit is correct Consider a frame containing L bits. Let P1 be the probability this frame (a sequence of L bits) arrives with no bit errors P1=(1-Pb)L The frame error rate, PF, is the probability that a frame of length L bits arrives with one or more bit errors PF= 1 – P1 = 1- (1-Pb)L Janice Regan © 2005-2013

Residual Frame Error Rate An error detection method can detect some fraction Y of the errors that occur The frame error rate was show to be PF= 1 – P1 = 1- (1-Pb)L The residual frame error rate is the probability that a frame or length L bits arrives with one or more errors not detectable by the error detection method being used PFR=(1-Y)PF= (1-Y){1- (1-Pb)L} Janice Regan © 2005-2013

Vertical Parity A simple method to provide error checking ability by adding one bit to each block of data (usually each character) to be transmitted. There are two approaches odd parity and even parity. For even parity Before sending the data Count the number of 1 bits in the data block. If there are an even number of ones the added bit is a zero If there are an odd number of ones the added bit is a one. After receiving the data Count the number of 1 bits in the data block including the parity bit. The block is in error if the number of 1 bits is odd. For odd parity interchange even and odd in the above procedure Janice Regan © 2005-2013

Vertical Parity: examples Even parity: can detect odd numbers of errors Odd parity: can’t detect even numbers of errors message Partiy bit 1 1 1 1 message Partiy bit 1 1 1 1 1 message Partiy bit 1 1 1 1 1 message Partiy bit 1 1 1 Janice Regan © 2005-2013

Vertical Parity: advantages/disadvantages Disadvantages of vertical parity Does not detect all possible errors Will detect odd numbers of bit errors Will not detect even numbers of bit errors Advantages of vertical parity Small overhead: add only one bit per block Simple to implement Efficient Janice Regan © 2005-2013

Vertical Parity: Residual Frame Error Rate The residual frame error rate is the probability that a frame or length L bits arrives with one or more errors not detectable by the error detection method being used PFR=(1-Y)PF= (1-Y){1- (1-Pb)L} Y is the fraction of errors that will be detected. To determine Y need to count all possible errors, ENT and all errors that can END (or cannot ENU) be detected Y = END/ENT = (1-ENU)/ENT Janice Regan © 2005-2013

Two dimensional parity With two dimensional parity, more parity bits are used on a large block of data The data is placed in a square grid, with a parity bit for each row and column of the grid At the cost of the additional parity bits we are able to detect pairs of errors For single bit errors the errors can be corrected Janice Regan © 2005-2013

Vertical Parity Two dimensional parity (even) 1 message Partiy bit 1 message Partiy bit Janice Regan © 2005-2013

Cyclic Redundancy Check: (CRC) Cyclic codes including CRC can detect many combinations of likely errors Single bit errors Errors in two consecutive bits Any odd number of single bit errors Burst errors (a sequence of bits some of which are in error) Only one listed combination can be detected at any one time. Janice Regan © 2005-2013

Advantages of CRC’s CRCs detect a larger proportion of the possible errors CRCs are practical and efficient to implement CRCs can be efficiently applied to larger blocks of data CRCs use more parity bits (usually 8, 12, 16, or 32), but often use fewer parity bits per bit of data Janice Regan © 2005-2013

Cyclic Redundancy Check: Modulo 2 arithmetic Modulo 2 arithmetic will be used in the discussion of CRCs For a polynomial in modulo 2 Xm+…..+X2+X+1 2m+…..+22+2+1 In modulo 2 arithmetic addition and subtraction are both equivalent to XOR Janice Regan © 2005-2013

Remember what a code is Consider a message k bits long. Take a data message k bits long Add m bits to be used for error detection/correction The resulting code word is n=m+k bits long. The rate of the code is k/(m+k) Any series of n bits will be represented by a chosen code word message FCS k-1 k k+m-1 Janice Regan © 2005-2013

Cyclic codes: 1 The sum of any two code words is also a code word Any cyclic shift of a code word is also a code word If a code word is 1110001010 Then any cyclic shift is also a code word 1100010101 0001010111 Any n bit code word can be expressed as a code polynomial (T0, T1, T2, … , Tn -1) Ti is either 0 or 1 Janice Regan © 2005-2013

Cyclic codes: 2 A cyclic code is uniquely determined by a generator polynomial P(X) of order m=n-k of the form Note that there are n-k+1 coefficients in P(X) P(X) must be a factor of T(X) for T(X) to be a valid code word. for all valid code words Each n bit code word consists of a k bit message, D(X), and a m bit frame check sequence F(X) (T0, T1, T2, … , Tn) (D0, D1, …, Dk -1 , F0, F1, …, Fm -1) Janice Regan © 2005-2013

Cyclic codes: 3 To determine F(X), the frame check bits (FCS) use modulo 2 arithmetic and Let (τ0, τ1, … , τn) (D0, D1, …, Dk-1, 0,…, 0) that is Divide τ(X) by P(X). The quotient is Q(X), and the remainder is F(X) F(X)=(F0, F1, …, Fm) is the FCS Janice Regan © 2005-2013

Polynomial division to find F(X) P(X) = X5+X4+X2+1 Q(X) 110101 111011 011101 000000 111010 011111 111110 110101 010110 101100 110010 01110 P(X) Order n m+1 bits Data shifted m bits Remainder F(X) m bits Janice Regan © 2005-2013

Cyclic codes: 4 The code word Tr(X) is received. Determine if errors have been introduced in T(X) during transmission {Tr(X) ≠ T(X)} Each bit error results in the reversal of one bit in the code word T(X) Where E(X), the error polynomial, is the m bit word with a 1 bit for each bit in error and a 0 bit for each correct bit There will be a remainder if E(X) is not divisible by P(X). If there is a remainder an error has be detected Janice Regan © 2005-2013

Polynomial division to check CRC P(X) = X5+X4+X2+1 Q(X) 110101 111011 011101 000000 111010 011111 111110 110101 010111 101111 00000 P(X) Order n m+1 bits Data shifted m bits Remainder F(X) m bits 0 indicates no errors detected Janice Regan © 2005-2013

Polynomial division to check CRC P(X) = X5+X4+X2+1 Q(X) 110101 111011 011101 000000 111010 110101 011111 111111 101010 11111 P(X) Order n m+1 bits Data shifted m bits Remainder F(X) m bits non 0 indicates errors have been detected Janice Regan © 2005-2013

Cyclic codes: 4 For cyclic redundancy codes, additional conditions are placed on the coefficients of the generating polynomial, P(X). The coefficients are 0’s and 1’s P0 and Pm must be 1 P(X) must have a factor with three terms P(X) must have a factor (1+X) Show that the types of errors that can be detected are Any odd number of errors Two bit errors Burst errors of length m ( order of P(X) ) Burst errors of length m+1 with probability All longer burst errors with probability Janice Regan © 2005-2013

CRC: Errors detected 1 Single bit errors Two bit errors P(X) has more than one term E(X) has one term and is, thus, not divisible by P(X) Two bit errors P(X) has more than 1 term so Xi not divisible by P(X) Janice Regan © 2005-2013

CRC: Errors detected 2 Odd numbers of bit errors E(X) has an odd number of terms P(X) has a factor (1+X) There is no polynomial with an odd number of terms that has (1+X) as a factor Assume such a polynomial, E(X), exists then E(X)=(1+X)Q(X) and E(1)=(1+1)Q(1)=0 but E(X) has an odd number of terms, so E(1) is the sum of an odd number of 1’s and must have value 1 E(X) is not divisible by P(X) All odd numbers of bit errors are detected Janice Regan © 2005-2013

What is a burst error? E(X), the error polynomial, has 0’s for bits in the code word that are correct when received, and 1’s for bits that are in error when received A burst error of length L is a series of L bits in E(X) where The first bit is the first 1 in E(X) The last bit is the last 1 bit in E(X) Consider an example E(X)=0000001010101011100000000 This contains a burst error 10101010111 The length of this burst error is 11 bits Janice Regan © 2005-2013

CRC: Errors detected 3 Burst errors of length j Both Xi and must be divisible by P(X) to assure E(X)/P(X) is 0 and no errors are detected P(X) has more than 1 term so Xi not divisible by P(X) P(X) is of order m+1 is of order j Consider all burst errors of length j ≤ m If j ≤ m the order of is ≤m and is thus smaller than the order of P(X) Therefore, is not divisible by P(X) For any burst error of length j≤m the division of E(X) by P(X) will result in a remainder F(X). The burst error will be detected Janice Regan © 2005-2013

CRC: Errors detected 4 Burst errors of length m+1 are detected with a probability of If j=m+1 the order of is m+1 The order of P(X) is also m +1 Therefore, is not divisible by P(X) unless What is the probability the a burst error of length m+1 will be detected The first and last bits must be 1, The m-1 remaining bits can be selected randomly. If all combinations of the m-1 bits are equally likely then the probability of a particular series of 1’s or 0’s is . This is the probability that P(X)=E(X) The probability the error is detected is thus Janice Regan © 2005-2013

General CRC architecture to implement divisor output Cn-1 + Cn-2 + C2 + C1 + C0 + input 1+A1X+A2X2+…+An-1Xn-1+Xn Janice Regan © 2005-2013

Commonly used CRC generating functions CRC-12 X12+X11+X3+X2+X+1 CRC-16 X16+X15+X2+1 CRC CCITT X16+X12+X4+1 CRC-32 X32+X26+X23+X22+X16+X12+X11 +X10+X8+ X7+X5+X4+X2+X+1 c11 c10 c9 c8 c7 c6 c5 c4 c3 c2 c1 c0 + + + + + c15 c14 c13 c12 c11 c10 c9 c8 c7 c6 c5 c4 c3 c2 c1 c0 + + + Janice Regan © 2005-2013

Circuit with Shift Registers : X5+X4+X2+1 0 0 0 0 0 1 0 1 0 0 0 1 1 0 1 0 0 0 0 0 1 0 1 0 0 0 1 1 0 1 0 0 0 0 0 0 1 0 0 0 1 1 1 0 1 1 1 0 1 0 0 0 0 0 1 1 0 1 1 0 1 1 1 0 1 0 1 0 0 0 0 0 1 1 1 0 1 0 1 0 0 0 0 0 1 1 0 1 0 0 1 1 1 1 1 0 0 0 0 0 1 1 1 1 1 0 0 0 0 0 1 1 1 1 0 0 1 0 1 1 Janice Regan © 2005-2013

Circuit with Shift Registers : X5+X4+X2+1 0 1 0 1 1 0 0 0 0 1 0 1 1 0 0 0 0 0 1 1 0 0 1 1 0 0 1 + c3 c2 c1 c0 c4 0 0 1 0 0 1 0 0 0 1 1 1 0 1 1 1 0 0 1 1 1 0 Janice Regan © 2005-2013

Polynomial division to find F(X) P(X) = X5+X4+X2+1 Q(X) 110101 111011 011101 000000 111010 011111 111110 110101 010110 101100 110010 01110 P(X) Order n m+1 bits Data shifted m bits Remainder F(X) m bits Janice Regan © 2005-2013