LECC03, 9/30/2003 Richard Kass/OSU 1 Richard Kass Radiation-Hard ASICs for Optical Data Transmission in the ATLAS Pixel Detector K.E. Arms, K.K. Gan, M. Johnson, H. Kagan, R. Kass, C. Rush, A. Rahimi, S. Smith, R. Ter-Antonian, M.M. Zoeller The Ohio State University A. Ciliox, M. Holder, S. Nderitu, M. Ziolkowski Universitaet Siegen, Germany l Introduction l Results from IBM 0.25  m Prototype Chips l Results from Proton Irradiations l Summary Outline

LECC03, 9/30/2003 Richard Kass/OSU 2 ATLAS Pixel Detector l Inner most charged particle tracking detector l Pixel size: 50  m x 400  m l ~ 100 million channels l Dosage after 10 years: middle barrel layer: 50 Mrad or MeV n eq /cm 2 optical link: 30 Mrad 2 disks/end 2 layers in barrel

LECC03, 9/30/2003 Richard Kass/OSU 3 ATLAS Pixel Opto-link VCSEL: Vertical Cavity Surface Emitting Laser diode VDC: VCSEL Driver Circuit PIN: PiN diode DORIC: Digital Optical Receiver Integrated Circuit Opto-board: this board holds the VDCs, DORICs, PINs, VCSELS use BeO as substrate for heat management

LECC03, 9/30/2003 Richard Kass/OSU 4 Convert LVDS input signal into single-ended signal appropriate to drive the VCSEL diode lOutput (bright) current: 0 to 20 mA, controlled by external voltage lStanding (dim) current: ~ 1 mA to improve switching speed lRise & fall times: 1 ns nominal (80 MHz signals) lDuty cycle: (50 +/- 4)% l“On” voltage of VCSEL: up to 2.3 V at 20 mA for 2.5 V supply l Constant current consumption! lCurrent design uses TRUELIGHT “high power oxide” VCSELs VCSEL Driver Circuit Specs

LECC03, 9/30/2003 Richard Kass/OSU 5 l Decode Bi-Phase Mark encoded (BPM) clock and command signals from PIN diode l Input signal:  A l Extract: 40 MHz clock l Duty cycle: (50 +/- 4)% l Total timing error: < 1 ns l Common Cathode PIN array l Bit Error Rate (BER): < at end of life Digital Optical Receiver IC Specs 40 MHz clock command BPM l Training period: ~1 ms of 20 MHz clock (BPM with no data) Input transitions  leading edges Internal delays  trailing edges

LECC03, 9/30/2003 Richard Kass/OSU 6 Status of VDC and DORIC VDC and DORIC produced using IBM 0.25  m CMOS process Migrated ATLAS SCT’s VDC & DORIC design in AMS 0.8  m Bipolar to DMILL DMILL (0.8  m CMOS) process met e-specs but was not rad hard enough VDC-I5e and DORIC-I5e: our fifth IBM submission Use CADENCE program 5 layers, enclosed layout transistors and guard rings 4 channels per chip ( VDC: 1.4mm  4mm DORIC: 2.3mm  4mm) engineering run, produced enough chips for production Received chips in June 2003 Electrical measurements performed on these chips: detailed measurements of many parameters: rise/fall time, duty cycle, bright/dim current… VDC-I5e and DORIC-I5e are acceptable for use in pixel detector Need to certify that these chips are radiation hard previous VDC and DORIC version (I4) rad hard to > 50Mrad detailed plan to certify radiation hardness

LECC03, 9/30/2003 Richard Kass/OSU 7 DORIC and VDC Layout Input Pads: Signal_in GndA Noise_in VddAmp VddA Preamp / Digital Test Pads Analog / Digital Bias, Resets Ch 1 Ch 2 Ch 3 Ch 4 Ch 1 Ch 2 Ch 3 Ch 4 DORIC-I5 ( 2.3 x 4mm) VDC-I5 ( 1.4 x 4mm)

LECC03, 9/30/2003 Richard Kass/OSU 8 VDC-I5e Measurements Eight VDCI5e chips with four channels per chip were measured VDCI5e duty cycle bright dim Spec is 50±4%

LECC03, 9/30/2003 Richard Kass/OSU 9 VDC-I5e Rise and Fall Times rise time fall time spec is <1 ns

LECC03, 9/30/2003 Richard Kass/OSU 10 Status of BeO Opto-Board First BeO opto-boards arrive in April. Find problems: many vias not filled. Send boards back to company for repair. Company only partially successful with repairs (~50% success rate) We find a new company to produce the boards (more $$$ too) two populated opto-boards used for rad-hardness tests converts electrical  optical 6-7 links/board

LECC03, 9/30/2003 Richard Kass/OSU 11 Radiation Hardness Measurements CERN August 2003 Important to measure/certify radiation hardness of optical components VDC DORIC VCSEL Fibers Glues, etc… Use CERN’s T7 beam (24 GeV protons) for radiation hardness studies. We perform two types of radiation hardness tests: Cold Box: read out VDC and DORIC electrically (copper wires) Shuttle: readout VDC and DORIC via optical fibers VDC and DORICs mounted on BeO opto-board shuttle can be moved in and out of beam remotely For both tests we monitor the VDCs and DORICs in real time.

LECC03, 9/30/2003 Richard Kass/OSU m Ribbon CERN Irradiation Tests System for Irradiation in Cold Box BER TesterDORIC Distribution 20 MHzVDC Distribution Beam Area Distribution Test Boards Coaxial 25m Ribbon + 25 m Coaxial 0.5m Ribbon VDC or DORIC Testing system at OSU before shipping to CERN PC

LECC03, 9/30/2003 Richard Kass/OSU 13 Irradiation Tests Opto-board Bit error test board in T7 control room 25 m fibers/wires Bi-phase marked optical signal Decoded data An irradiation test Opto-link System for Irradiation in Shuttle data DORIC clock PIN VDC VCSEL Opto-pack VDCVCSEL measure power of clock and data Vs dose

LECC03, 9/30/2003 Richard Kass/OSU 14 Setup for CERN’s T7 Shuttle opto-boards Remotely moves in/out of beam 25m of optical fibers Optical fibers shuttle test electronics at OSU prior to shipping to CERN

LECC03, 9/30/2003 Richard Kass/OSU 15 Results from Irradiation all other links: pseudo-random bit string and I pin =100 uA Opto-board #1 Thresholds independent of dose Threshold for zero bit errors vs Dose anneal

LECC03, 9/30/2003 Richard Kass/OSU 16 Opto-board #1(BeO#3) Beam Iset = 0.6 mA (=10mA) for beam, 1.5mA (=1314mA) for annealing Opto-board #2(BeO#4) Irradiate for ~4-6 MRad (~4-5 hours) Move boards out of the beam and anneal for hours  VCSELs need time to anneal Monitor the optical power of each link in real time. Results from Irradiation Clock Optical Power Vs Dose anneal

LECC03, 9/30/2003 Richard Kass/OSU 17 Summary and Conclusions VDC and DORIC chips satisfy ATLAS Specs BeO Opto-board: Original vendor not able to produce quality boards Have found new vendor  updated layout submitted Radiation studies: Cold Box: VDC and DORIC are more than hard enough! Shuttle: VCSEL radiation hardness an issue will VCSELs anneal enough to meet power specs ? Move to Production in 2004 ~ 500 VDCs, ~400 DORICs, ~200 opto-boards (includes spares)