CPU Fetch/Execute Cycle

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Presentation transcript:

CPU Fetch/Execute Cycle Computer program Electronic clock Computer Memory Data/address buses Fetch/Execute Cycle Accumulator ALU/Control Unit/Program Counter CIR/MDR/MAR

Simple Microprocessor Memory Electronic Clock Arithmetic Logic Unit Accumulator Control Unit Memory Address Register Current Instruction Register Memory Data Register Program Counter Internal Bus Special Internal Bus Structure Data Bus Address Bus Data bus

Simple Microprocessor Memory Simple Microprocessor 10 00000010 (2) Electronic Clock 11 00000011 (3) 12 00000000 (R) Internal Bus … PC Data Control Unit Internal Bus Bus MAR Address Bus Data Accumulator Bus Data 100 10011010 CIR Special Internal Bus Structure Bus 101 11001011 Data 102 11101100 MDR Data bus ALU Bus

Simple Microprocessor Memory Simple Microprocessor 10 00000010 (2) Electronic Clock 11 00000011 (3) 12 00000000 (R) Internal Bus … PC 01100100 = 100 Data Control Unit Internal Bus Bus MAR Address Bus Data Accumulator Bus Data 100 10011010 CIR Special Internal Bus Structure Bus 101 11001011 Data 102 11101100 MDR Data bus ALU Bus

Fetch Phase (1st Instruction) Memory Fetch Phase (1st Instruction) 10 00000010 (2) Electronic Clock 11 00000011 (3) 12 00000000 (R) Internal Bus … PC 01100100 = 100 Data Control Unit Internal Bus Bus MAR Address Bus 0100100 Data Accumulator Bus Data 100 10011010 CIR Special Internal Bus Structure Bus 10011010 101 11001011 Data 102 11101100 MDR Data bus ALU Bus 10011010

1st Instruction Decoded Memory 1st Instruction Decoded 10 00000010 (2) Electronic Clock 11 00000011 (3) Load number from memory location 10 12 00000000 (R) Internal Bus … PC 01100101 = 101 Data Control Unit Internal Bus 10011010 Bus MAR Address Bus 0100100 Data Accumulator Bus Data 10011010 CIR Special Internal Bus Structure Bus 10011010 101 11001011 Data 102 11101100 MDR Data bus ALU Bus 10011010

1st Instruction Executed Memory 1st Instruction Executed 10 00000010 (2) Electronic Clock 11 00000011 (3) Load number from memory location 10 12 00000000 (R) Internal Bus … PC 01100101 = 101 Data Control Unit Internal Bus 10011010 Bus MAR Address Bus 00001010 Data Accumulator 00000010 Bus Data 10011010 CIR Special Internal Bus Structure Bus 10011010 101 11001011 Data 102 11101100 MDR Data bus ALU Bus 00000010

Fetch Phase (2nd Instruction) Memory Fetch Phase (2nd Instruction) 10 00000010 (2) Electronic Clock 11 00000011 (3) 12 00000000 (R) Internal Bus … PC 01100110 = 102 PC 01100101 = 101 Data Control Unit Internal Bus Bus MAR Address Bus 01100101 Data Accumulator 00000010 Bus Data 10011010 CIR Special Internal Bus Structure Bus 11001011 101 11001011 Data 102 11101100 MDR Data bus ALU Bus 11001011

2nd Instruction Decoded Memory 2nd Instruction Decoded 10 00000010 (2) Electronic Clock 11 00000011 (3) Load number from memory location 11 12 00000000 (R) Internal Bus … PC 01100110 = 102 Data Control Unit 11001011 Internal Bus Bus MAR Address Bus 01100101 Data Accumulator 00000010 Bus Data 10011010 CIR Special Internal Bus Structure Bus 11001011 11001011 Data 102 11101100 MDR Data bus ALU Bus 11001011

2nd Instruction Execution Memory 2nd Instruction Execution 10 00000010 (2) Electronic Clock 11 00000011 (3) 12 00000000 (R) Internal Bus … PC 01100110 = 102 Data Control Unit 11001011 Internal Bus Bus MAR Address Bus 00001011 Data Accumulator 00000101 00000010 Bus Data 10011010 CIR Special Internal Bus Structure Bus 11001011 11001011 Data 102 11101100 MDR Data bus 00000010 ALU + Bus 00000011 00000101 00000011