Lecture 6 Karnaugh Map. Logic Reduction Using Karnaugh Map Create a Karnaugh Map Circle (2, 4, 8..) 1’s. OR the minterm generated by each loop.

Slides:



Advertisements
Similar presentations
Techniques for Combinational Logic Optimization
Advertisements

Chapter 3 Gate-Level Minimization
Figure 4.1. The function f (x1, x2, x3) =  m(0, 2, 4, 5, 6).
ECE 238L Computer Logic Design Spring 2010
Gate-Level Minimization
Chapter 3 Simplification of Switching Functions. Karnaugh Maps (K-Map) A K-Map is a graphical representation of a logic function’s truth table.
Lecture 4 More Examples of Karnaugh Map. Logic Reduction Using Karnaugh Map Create an Equivalent Karnaugh Map Each circle must be around a power of two.
Lecture 3 Karnaugh Map Chapter 2 Jack Ou, Ph.D.. Home Alarm Logic.
ENGIN112 L8: Minimization with Karnaugh Maps September 19, 2003 ENGIN 112 Intro to Electrical and Computer Engineering Lecture 8 Minimization with Karnaugh.
1 Homework Reading –Tokheim, Section 5-1, 5-2, 5-3, 5-7, 5-8 Machine Projects –Continue on MP4 Labs –Continue labs with your assigned section.
CSE-221 Digital Logic Design (DLD)
Karnaugh Maps Discussion D6.2 Section Karnaugh Maps Minterm X Y F m m m m X Y F(X,Y) = m0 | m2 | m3 =  (0,2,3)
Combinational Logic Discussion D2.5. Combinational Logic Combinational Logic inputsoutputs Outputs depend only on the current inputs.
Karnaugh Maps Discussion D6.2 Appendix H. Karnaugh Maps Minterm x y f m m m m x y f(x,y) = m0 | m2 | m3 =  (0,2,3)
CS 151 Digital Systems Design Lecture 8 Minimization with Karnaugh Maps.
ITEC 352 Lecture 5 Low level components(3). Low level components Review Multiplexers Demultiplexer Minterm/Maxterm Karnaugh Map.
Boolean Algebra and Digital Circuits
1 Chapter 5 Karnaugh Maps Mei Yang ECG Logic Design 1.
CHAPTER 1 INTRODUCTION TO DIGITAL LOGIC. K-Map (1)  Karnaugh Mapping is used to minimize the number of logic gates that are required in a digital circuit.
Eng. Mohammed Timraz Electronics & Communication Engineer University of Palestine Faculty of Engineering and Urban planning Software Engineering Department.
1 Digital Logic Design Week 5 Simplifying logic expressions.
Digital Systems I EEC 180A Lecture 4 Bevan M. Baas.
ENEE244-02xx Digital Logic Design Lecture 12. Announcements HW4 due today HW5 is up on course webpage. Due on 10/16. Recitation quiz on Monday, 10/13.
Minimisation ENEL111. Minimisation Last Lecture  Sum of products  Boolean algebra This Lecture  Karnaugh maps  Some more examples of algebra and truth.
Karnaugh Mapping Digital Electronics. Karnaugh Mapping or K-Mapping This presentation will demonstrate how to Create and label two, three, & four variable.
1 Homework Reading –Tokheim, Section 5-1, 5-2, 5-3, 5-7, 5-8 Machine Projects –Continue on MP4 Labs –Continue labs with your assigned section.
BOOLEAN ALGEBRA AND LOGIC SIMPLIFICATION
CHAPTER 1 INTRODUCTION TO DIGITAL LOGIC
THE K-MAP.
Karnaugh Maps (K-Map) A K-Map is a graphical representation of a logic function’s truth table.
The Circle. Examples (1) – (5) Determine the center and radius of the circle having the given equation. Identify four points of the circle.
Module 11.  In Module 9, we have been introduced to the concept of combinational logic circuits through the examples of binary adders.  Meanwhile, in.
EE2420 – Digital Logic Summer II 2013 Hassan Salamy Ingram School of Engineering Texas State University Set 5: Karnaugh Maps.
1 Karnaugh Map Method Truth Table -TO- K-Map Y0101Y0101 Z1011Z1011 X0011X0011 minterm 0  minterm 1  minterm 2  minterm 3 
Karnaugh Maps (K maps).
Chapter 4 OPTIMIZED IMPLEMENTATION OF LOGIC FUNCTIONS.
CEC 220 Digital Circuit Design More Karnaugh Maps Monday, February 02 CEC 220 Digital Circuit Design Slide 1 of 11.
CEC 220 Digital Circuit Design Implicants Wed, Sept. 23 CEC 220 Digital Circuit Design Slide 1 of 10.
School of Computer and Communication Engineering, UniMAP DKT 122/3 - DIGITAL SYSTEM I Chapter 4A:Boolean Algebra and Logic Simplification) Mohd ridzuan.
Dr. Nermin Hamza. x · y = y · x x + y = y + x x · (y · z) = (x · y) · z x + (y + z) = (x + y) + z x · (y + z) = (x · y) + (x · z) x + (y · z) = (x + y)
Lecture 21: Combinatorial Circuits II Discrete Mathematical Structures: Theory and Applications.
CHAPTER 1 INTRODUCTION TO DIGITAL LOGIC:K-Map. K-Map (1)  Karnaugh Map provides a systematic method for simplifying Boolean expressions and may produce.
MULTI-LEVEL GATE CIRCUITS / NAND AND NOR GATES
Homework Reading Machine Projects Labs
Minimization of Circuits
CSC205 Jeffrey N. Denenberg Lecture #5
Karnaugh Map Method.
Lecture 5 Dr. Nermin Hamza.
Instructor: Alexander Stoytchev
Karnaugh Mapping Karnaugh Mapping Digital Electronics
Karnaugh Mapping Digital Electronics
Section 5.1 Solving inequalities
ECE 331 – Digital System Design
Karnaugh Mapping Karnaugh Mapping Digital Electronics
Inequalities and their Graphs
Homework Reading Tokheim, Section 5-10, 7-4.
Karnaugh Mapping Digital Electronics
Chapter - Karnaugh Maps
Lecture No. 32 Sequential Logic.
Chapter 10.3 and 10.4: Combinatorial Circuits
Instructor: Alexander Stoytchev
Instructor: Alexander Stoytchev
Instructor: Alexander Stoytchev
Guest Lecture by Kyle Tietz
Functions and Relations
Instructor: Alexander Stoytchev
Karnaugh Maps (K maps).
Instructor: Alexander Stoytchev
Principles & Applications
Presentation transcript:

Lecture 6 Karnaugh Map

Logic Reduction Using Karnaugh Map Create a Karnaugh Map Circle (2, 4, 8..) 1’s. OR the minterm generated by each loop

Setting Up Karnaugh Map

Karnaugh Map for 2-Variables

3-Variables Karnaugh Map

3-Variable Karnaugh Map Notice the order: (outputs)

Karnaugh Map for 4-Variables

Example 1

Example 2

Home Alarm Example

Notation

Looping Groups of Two Groups of Four Group of Eight

Looping Groups of Two

Looping Groups of Four

Looping Groups of Eight

Problem 1

Solution to Problem 1

Problem 2

Solution to Problem 2

Problem 3

Solution for Problem 3

Two Equally Valid Solutions