9/15/09 - L15 Decoders, Multiplexers Copyright Joanne DeGroat, ECE, OSU1 Decoders and Multiplexers

9/15/09 - L15 Decoders, Multiplexers Copyright Joanne DeGroat, ECE, OSU2 Class 15 – Decoders, Multiplexers  Decoders  Multiplexers  Material from section 3-7 and 3-9 of text

Decoder background  Given a n-bit binary number there are 2 n things it can represent or lines that can be activated  Activated can mean pulling the signal high (Active High) or pulling the signal low (Active Low) 9/15/09 - L15 Decoders, Multiplexers Copyright Joanne DeGroat, ECE, OSU3

Decoder definition  Decoding is the conversion of an n-bit input code to an m-bit output code with n ≤ m ≤ 2 n, such that each valid code work produces a unique output code.  Decoding in performed by a logic circuit called a decoder.  A decoder may have unused bit combinations on its inputs. For these no valid output occurs. 9/15/09 - L15 Decoders, Multiplexers Copyright Joanne DeGroat, ECE, OSU4

n-to-m-line decoders  Circuit has n inputs and m outputs and m ≤ 2 n  Start with n=1 and m=2  This a 1-to-2 Line decoder – exactly one of the output lines will be active. 9/15/09 - L15 Decoders, Multiplexers Copyright Joanne DeGroat, ECE, OSU5

n-to-m-line decoders  A decoder when n=2 and m=4  A 2-to-4 line decoder  Note that only one output is ever active 9/15/09 - L15 Decoders, Multiplexers Copyright Joanne DeGroat, ECE, OSU6

Can be seen to create structure  For the 2-to-4 line  Contains 2 2-to-1 line decoders and the additional logic. 9/15/09 - L15 Decoders, Multiplexers Copyright Joanne DeGroat, ECE, OSU7

Higher levels of structure  A 3-to-8 line decoder  Can be extended to even high levels 9/15/09 - L15 Decoders, Multiplexers Copyright Joanne DeGroat, ECE, OSU8

And on the other hand  Encoding – An encoder is a digital function that performs the inverse operation of a decoder. An encoder has 2 n (or fewer) inputs and n output lines that indicate which single bit of the input is active. 9/15/09 - L15 Decoders, Multiplexers Copyright Joanne DeGroat, ECE, OSU9

Octal to binary Encoder  Table 3-7 of text. 9/15/09 - L15 Decoders, Multiplexers Copyright Joanne DeGroat, ECE, OSU10

Selecting  The Multiplexer – a digital building block for selecting and routing signals  The select signal, S, routes input I 0 or I 1 to the output Y in this 2-to-1 multiplexer.  Y = S’ I 0 + S I 1 9/15/09 - L15 Decoders, Multiplexers Copyright Joanne DeGroat, ECE, OSU11

Multiplexing in general  You have 2 n input lines and a n-bit selection control input which routes that specific input to the output.  Have seen a 2-to-1 mux. – The circuit 9/15/09 - L15 Decoders, Multiplexers Copyright Joanne DeGroat, ECE, OSU12

Also common is the 4-to-1 mux  In the 2-to-1 mux there is a 1-to-2 decoder and then the 2 enabling and gates  In a 4-to-1 mux you have a 2-to-4 decoder to select which of the 4 inputs, I 0, I 1, I 2, I 3 is routed to the output Y.  4-to-1 mux 2 select inputs 4 data line inputs 1 output 9/15/09 - L15 Decoders, Multiplexers Copyright Joanne DeGroat, ECE, OSU13

Typical occurances  The size for typical use can be seen from the configurations that were available in SSI/MSI components.  Available 1-to-2, 2-to-4, 3-to-8, and 4-to-16 line decoders 2-to-1, 4-to-1, 8-to-1 multiplexers  Larger sizes, when needed could be implemented from the basic units. 9/15/09 - L15 Decoders, Multiplexers Copyright Joanne DeGroat, ECE, OSU14

Class 15 assignment  Covered sections 3-7 and 3-10  Problems for hand in none  Problems for practice , 37,44, 46, 48  Reading for next class: sections same 9/15/09 - L15 Decoders, Multiplexers Copyright Joanne DeGroat, ECE, OSU15