Group member: Zhaoxin Mamengduo Cfang Stanley The Implementation of Delta-Sigma Modulation in Digital-to-Analog Converter 1.

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Presentation transcript:

Group member: Zhaoxin Mamengduo Cfang Stanley The Implementation of Delta-Sigma Modulation in Digital-to-Analog Converter 1

Project Idea Motivation: EE 505 CMOS Data Conversion circuits During the process of digital-to-analog converting Use Delta-sigma modulator to push noise in music to high frequency band Use speaker/headphone as the low-pass filter to filtrate high frequency white noise 2

Top Level Components Delta-sigma modulation Delta-sigma modulation Low pass filter PCM(digital) In Serial Pulse Width Modulation (PWM,digital) Signal In Serial 3

Level-shifter for DVD Output Signal Output signal(from DVD) voltage: -0.5V~+0.5V Schmidt trigger: SN74LS14N 4 rheostat

Demo Film1 Play CD Film1 Film2 Input signal voltage shift Film2 ture=youtu.be Film3 Sleep mode Film3 ature=youtu.be 5

The Structure of DAC module 6

Input: PCM 7

The 3-stage Delta-sigma Modulation Y 1 = X+(1 - Z -1 )Q Y 2 =- Q 1 +( 1 - Z - 1 )Q 2 Y 3 =(- Q 2 )+ (1 - Z -1 )Q 3 Y = X+ ( 1 - Z - 1 ) 3Q 3 PCM PWM 8

Eleven PWM Signals 9

Output: PWM PWM: digital signal but has analog info. 10

Matlab Simulation: Noise is pushed to higher frequencies 11

Using Filter to Cutoff Noise 12

One Order Noise Shaping Model Q = Y - U U - Y =- Q U = X - Q 13

One Order Noise Shaping Model U (n) = X (n) - Q (n-1) Q (n) = Y (n) - U (n) Y (n) = X (n) - Q (n - 1) + Q (n) = X (n) + Q (n) - Q (n - 1) Q (n) - Q (n - 1) =( 1 - Z - 1 )Q Y = X +( 1 - Z - 1 )Q 14

The 3-stage Delta-Sigma Modulation Y 1 = X+(1 - Z -1 )Q Y 2 =- Q 1 +( 1 - Z - 1 )Q 2 Y 3 =(- Q 2 )+ (1 - Z -1 )Q 3 Y = X+ ( 1 - Z - 1 ) 3Q 3 15

Clock Synchronization with DVD Input signal(from DVD) is in serial: Need to decode SPDIF signal So need to synchronize clock with DVD 16

Clock Synchronization and Data Extraction 17

Clock Synchronization 44.1kHz frame rate×2 channel ×32 data×2 phase = MHz Keep detecting : temp1=temp2=temp3 & temp4=temp5=temp6 Then generate sampling center pulse 18

Clock Synchronization(cont.) 19

Data Extraction 20

Data Extraction(cont.) Keep detecting frame header or | or

Sleep Mode(Power Saving) system 22

Volume Control Matlab verification Lower volume: right shift Larger volume: left shift Debounce module( real world) 23

Reference ams_ocq05.pdf ams_ocq05.pdf ml ml Delta-Sigma.pdf Delta-Sigma.pdf 24

Thank you! Q and A 25