Summary of projects present and future G. Visser 3/26/2015 NPE electronics group meeting

Belle-II iTOP “Task 6” The design and production of front boards and HVB assemblies for iTOP “Module 01”, Feb 2015, at KEK One (final prototype) module down, seventeen more to go… UH boards (incl. preamps) cable “squeeze” cooling nightmares see “task 5” 2.8 m of Quartz Module (“QBB”)

Potted HVB assembly on pogo pin solder fixture HVB assembled with bracket and cables Front board (back view)

Front boards Design is finished, evaluation completed All PCB’s ordered, nearly all received (haggling over “rejects”) FYI this is a very unusual PCB: 7 layer sequential lamination with very deep blind holes (over 90% of thickness) with critical diameter tolerance, and high voltage breakdown risks, e.g. 4kV over 1.8mm on surface All PMT pin sockets (semi-custom) ordered and received Other part is capacitors, ~20% due in May Test system is finally getting to completion this week (early boards not fully tested at IU, although no subsequent rejects at KEK fortunately) 166 boards deliverable 20 delivered to date ~60 ready for final test ~75 in process by John ~15 need rework or replacement (~10 further PCB’s will be sent from vendor stock) PROBLEM SPOTS Metal in mounting holes – sent back to vendor for rework, ok now Hole diameter issues  fractured pin sockets  scrapped boards… Hole depth issues – minor problem, easily reworked now Stains, soldermask defects – minor problems, but can take time Possible issues with John’s time / contention with other projects

Design is finished, evaluation completed (except real signals in module – firmware and analysis work stand in the way) All PCB’s ordered and received All “pogo pin” connectors received All cables (terminated at other end and tested) received All other components received Test system is fully designed, built, and verified Brackets received, about to send out for plating Production has been ON HOLD pending thermal design issues for readout; releasing just about now 83 assemblies deliverable 4 assemblies delivered to date, now in module 01 6 PCB’s pre-tested, ready to mount to brackets, cables, pot and test 80 bare PCB’s, ready to send for assembly Basic sketch of workflow at IU: Pre-test assembled boards, attach to brackets, attach cables, pot, attach pogo pins, test & ship HVB assemblies PROBLEM SPOTS Still need to get vendor involved in potting step Back-up plan to pot in house requires fixture & technique development and vacuum chamber Mechanical inspection (pogo pin position) needs technique development still Possible issues with John’s time / contention with other projects Testing may need to be done by GV (or else more investment in software, ok)

Belle-II iTOP “Task 5” Nominally preamplifier design, but really “anything else iTOP that needs doing” Preamplifier design and validation – done Contribute to cooling design and validation – nearly done? Cable and connector design / plan Custom long power cable, help with procurement (Nagoya U.) SCROD power wire bundle SCROD trigger/clock/JTAG connection cables Design connector PCB Power supply selection, evaluation, help with procurement (PNNL) “Patch board” design (for power cable patch inside Belle-II) Contribute to decisions on rack layout, AC power requirements, cable routes, etc. Revisit preamplifier gain Mismatch between UH, Nagoya PMT test results not clearly understood Cross-check in some ways at IU Optimize preamplifier components for gain change factor to be decided by UH Much effort in review, e.g. of UH PCB’s, and in discussions on cooling and power requirements, etc. etc. What next? Something will come up. There will certainly be a need for 1 or 2 trips to KEK to ensure cable and power supply installations going as needed, and to test things Probably other longer term integration work will follow

STAR Presently not doing any major development work Small design: Improved “PWC” board for test setups using FPS readout electronics that we designed last year For EPD development groups (Ohio State, Purdue, BNL), for FCS development (Hank’s and/or Oleg’s), and for Chen-Yu’s UCN lifetime experiment, possibly. And maybe for iTPC development, I just heard yesterday. Need to redesign and build properly the “jitter cleaner” box. This is a critical item (failure will take down whole experiment) we need a real box with real spare. (Knew that, but was recently reminded by events…) Maybe something else needed for pedestal run clock “problem” Spares testing and repair is still needed for: IST/FGT/GMT: readout boards (“ARM”) ESMD: FEE boards and other boards Data collector boards Still possible project someday to replace data collector input board – work for Brandon? There may be some new detector projects… Not clear yet what, when, how likely… FCS? FGT again? EPD? EIC calorimeter R&D electronics, some redesign needed for beam tests maybe this year

STAR FPS

nEXO Have been working a small amount of time (<100h) on nEXO with local funds from Lisa. In collaboration with ORNL we have a discrete prototype of a SiPM preamplifier for nEXO and have begun testing this with “large” area SiPM from SensL, Inc. Lisa is now working to set up contract/funds ~$20k for R&D here this fiscal year (so, time is constrained for sure…). More I guess can follow later. Idea is to continue this work, with MEG-type Hamamatsu SiPM’s (actually UV sensitive & liquid xenon compatible). Will be done as cold as we can, but in dry gas only. Have -30 °C chamber, that may have to do. slides from a nEXO meeting

Other Must finish preamp support items for Mike’s neutron lifetime experiment Preamp is done (a while ago), tested with pulser only Power box finally done past Monday Cable being terminated this week (GV) Have to check and document the opto receiver Ideally, should take Am-241 spectrum through the whole chain before handing off, but maybe not… Fiber/SiPM neutron detector for UCN lifetime Small work involved to set up prototype (this is just parasite on STAR work) Will there be a real detector? Some modest engineering work may be needed. What else is in pipeline?