MOSFET Cross-Section. A MOSFET Transistor Gate Source Drain Source Substrate Gate Drain.

Slides:

Advertisements

Similar presentations

MOSFET Transistor Basics

Advertisements

ECSE-6230 Semiconductor Devices and Models I Lecture 14

(Neil weste p: ).  A MOS transistor is a majority-carrier device, in which the current in a conducting channel between the source and the drain.

Chapter 6 The Field Effect Transistor

Department of EECS University of California, Berkeley EECS 105 Fall 2003, Lecture 12 Lecture 12: MOS Transistor Models Prof. Niknejad.

Lecture 11: MOS Transistor

Introduction to VLSI Circuits and Systems, NCUT 2007 Chapter 6 Electrical Characteristic of MOSFETs Introduction to VLSI Circuits and Systems 積體電路概論賴秉樑.

Lecture 15 OUTLINE MOSFET structure & operation (qualitative)

© Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

Metal-Oxide-Semiconductor (MOS)

EE415 VLSI Design The Devices: MOS Transistor [Adapted from Rabaey’s Digital Integrated Circuits, ©2002, J. Rabaey et al.]

The metal-oxide field-effect transistor (MOSFET)

Digital Integrated Circuits A Design Perspective

Reading: Finish Chapter 6

Week 9a OUTLINE MOSFET ID vs. VGS characteristic

Week 8b OUTLINE Using pn-diodes to isolate transistors in an IC

EE105 Fall 2007Lecture 16, Slide 1Prof. Liu, UC Berkeley Lecture 16 OUTLINE MOS capacitor (cont’d) – Effect of channel-to-body bias – Small-signal capacitance.

© Digital Integrated Circuits 2nd Devices VLSI Devices  Intuitive understanding of device operation  Fundamental analytic models  Manual Models  Spice.

MOSFET: Subthreshold Operation Professor Paul Hasler.

Semiconductor Devices III Physics 355. Transistors in CPUs Moore’s Law (1965): the number of components in an integrated circuit will double every year;

© 2012 Eric Pop, UIUCECE 340: Semiconductor Electronics ECE 340 Lecture 35 MOS Field-Effect Transistor (MOSFET) The MOSFET is an MOS capacitor with Source/Drain.

ECE 342 Electronic Circuits 2. MOS Transistors

MOS Capacitors MOS capacitors are the basic building blocks of CMOS transistors MOS capacitors distill the basic physics of MOS transistors MOS capacitors.

EE213 VLSI Design S Daniels Channel Current = Rate of Flow of Charge I ds = Q/τ sd Derive transit time τ sd τ sd = channel length (L) / carrier velocity.

NOTICES Project proposal due now Format is on schedule page

© Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

The Devices Digital Integrated Circuit Design Andrea Bonfanti DEIB

© Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

Norhayati Soin 06 KEEE 4426 WEEK 7/1 6/02/2006 CHAPTER 2 WEEK 7 CHAPTER 2 MOSFETS I-V CHARACTERISTICS CHAPTER 2.

Introduction to Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) Chapter 7, Anderson and Anderson.

Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 10: September 28, 2011 MOS Transistor.

Modern VLSI Design 4e: Chapter 2 Copyright  2009 Prentice Hall PTR Topics n Derivation of transistor characteristics.

Modern VLSI Design 3e: Chapter 2 Copyright  1998, 2002 Prentice Hall PTR Topics n Derivation of transistor characteristics.

EXAMPLE 6.1 OBJECTIVE Fp = 0.288 V

Chapter 4 Field-Effect Transistors

1 Fundamentals of Microelectronics  CH1 Why Microelectronics?  CH2 Basic Physics of Semiconductors  CH3 Diode Circuits  CH4 Physics of Bipolar Transistors.

ECE340 ELECTRONICS I MOSFET TRANSISTORS AND AMPLIFIERS.

Junction Capacitances The n + regions forms a number of planar pn-junctions with the surrounding p-type substrate numbered 1-5 on the diagram. Planar junctions.

Chapter 2 MOS Transistors. 2.2 STRUCTURE AND OPERATION OF THE MOS TRANSISTOR.

ECE442: Digital ElectronicsCSUN, Spring-2010-Zahid MOS Transistor ECE442: Digital Electronics.

Budapest University of Technology and Economics Department of Electron Devices Microelectronics, BSc course Field effect transistors.

EE141 © Digital Integrated Circuits 2nd Devices 1 Lecture 5. CMOS Device (cont.) ECE 407/507.

EE141 © Digital Integrated Circuits 2nd Devices 1 Goal of this lecture  Present understanding of device operation  nMOS/pMOS as switches  How to design.

1ECE 584, Summer 2002Brad Noble Chapter 3 Slides Cross Sectional View of FET.

Short-channel Effects in MOS transistors

Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 10: September 19, 2014 MOS Transistor.

MOS Transistor Other handouts Project Description Other “assignments”

The MOS Transistor Polysilicon Aluminum. The NMOS Transistor Cross Section n areas have been doped with donor ions (arsenic) of concentration N D - electrons.

741 Op-Amp Where we are going:. Typical CMOS Amplifier.

MOSFET Current Voltage Characteristics Consider the cross-sectional view of an n-channel MOSFET operating in linear mode (picture below) We assume the.

EE141 © Digital Integrated Circuits 2nd Devices 1 Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje.

MOS Capacitor Picture.

Metal-oxide-semiconductor field-effect transistors (MOSFETs) allow high density and low power dissipation. To reduce system cost and increase portability,

Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 11: September 22, 2014 MOS Transistor.

Field Effect Transistor (FET)

Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 10: September 20, 2013 MOS Transistor.

EE 466/586 VLSI Design Partha Pande School of EECS Washington State University

The MOS capacitor. (a) Physical structure of an n+-Si/SiO2/p-Si MOS capacitor, and (b) cross section (c) The energy band diagram under charge neutrality.

ECE 333 Linear Electronics

Damu, 2008EGE535 Fall 08, Lecture 21 EGE535 Low Power VLSI Design Lecture #2 MOSFET Basics.

MOSFETs: Drain Voltage Effects on Channel Current Prof. Paul Hasler.

The NFET explained… in only a few confusing slides.

Floating-Gate Devices / Circuits

Lecture 20 OUTLINE The MOSFET (cont’d) Qualitative theory

6.3.3 Short Channel Effects When the channel length is small (less than 1m), high field effect must be considered. For Si, a better approximation of field-dependent.

EE141 Chapter 3 VLSI Design The Devices March 28, 2003.

741 Op-Amp Where we are going:.

Last Lecture – MOS Transistor Review (Chap. #3)

Lecture 20 OUTLINE The MOSFET (cont’d) Qualitative theory

EXAMPLE 7.1 BJECTIVE Determine the total bias current on an IC due to subthreshold current. Assume there are 107 n-channel transistors on a single chip,

Presentation transcript:

MOSFET Cross-Section

A MOSFET Transistor Gate Source Drain Source Substrate Gate Drain

MOSFET Schematic Symbols

Formation of the Channel for an Enhancement MOS Transistor

Water Analogy of a (subthreshold) MOSFET

Channel Current vs. Gate Voltage Gate voltage (V) Channel Current (  A) Gate voltage (V) Channel Current (A) Above-ThresholdSub-Threshold In linear scale, we have a quadratic dependence In log-scale, we have an exponential dependence VTVT VTVT I th

MOS Capacitor Picture

MOSFET Channel Picture

MOS Capacitor Picture

MOS Electrostatics Condition is called flatband --- the voltage when this occurs is called flatband This state is the baseline operating case --- a capacitive divider has one free parameter V fb

MOS Electrostatics Depletion Condition --- gate charge is terminated by charged ions in the depletion region Part of this region is often referred to as weak-inversion

MOS Electrostatics Inversion --- further gate charge is terminated by carriers at the silicon--silicon-dioxide interface

MOS Structure Electrostatics

MOS Capacitor Picture

MOS-Capacitor Regions Q s = ln( 1 + e ) (  (V g - V T ) - V s )/U T Q s = e (  - V s )/U T Depletion (  (V g - V T ) - V s < 0) Q s = e (  (V g - V T ) - V s )/U T Inversion (  (V g - V T ) - V s > 0) Q s = (  (V g - V T ) - V s )/U T

MOS Capacitor Picture

MOSFET Channel Picture

Calculation of Drain Current

No recombination  dx nd DnDn n dn qDJ  l nn drainsource n  0 l  varies as  V G  n = Ax + B RG dx nd D dt dn n      eeII UVVUVV TdgTSg   / / 0 

MOSFET Current-Voltage Curves   1 /)( 0 //)( 0 / // 0 TSG TdsTSG TD TSTG uV VV uVuV VV uV uVu VV DS eI eeI eeeII        Saturation 4 Tds UV    eeII uVVuVV TdgTSg   // 0     1 / / 0 TSd TSg uVV uVV eeI    

MOSFET Current-Voltage Curves   1 /)( 0 //)( 0 / // 0 TSG TdSTSG TD TSTG uVKV uVuV uV uVu DS eI eeI eeeII          eeII uVVuVV TdgTSg   // 0     1 / / 0 TSd TSg uVV uVV eeI    

Subthreshold MOSFETs In linear scale, we have a quadratic dependence In log-scale, we have an exponential dependence G S D nFET G S D B pFET

Determination of Threshold Voltage Gate voltage (V) Drain current / subthreshold fit V T = 0.86

Drain Current --- Source Voltage

Drain Characteristics

Origin of Drain Dependencies Increasing Vd effects the drain-to-channel region: increases depletion width increases barrier height

Current versus Drain Voltage Not flat due to Early effect (channel length modulation) I d = I d (sat) (1 + (V d /V A ) ) or I d = I d (sat) e Vd/VA R out I d (sat) GND I out

Early Voltage Length Dependence Width of depletion region depends on doping, not L Might expect Vo to linearly vary with L

MOSFET Operating Regions Band-diagram picture moving from subthreshold to above-threshold Surface potential moving from depletion to inversion

Qualitative Above-Threshold I = (K/2  ) ( (  (V g - V T ) - V s ) 2 - ( (  (V g - V T ) - V d ) 2 )

Above Threshold MOSFET Equations I = (K/2  ) ( (  (V g - V T ) - V s ) 2 - (  (V g - V T ) - V d ) 2 ) Saturation: Q d = 0 I = (K/2  ) ( (  (V g - V T ) - V s ) 2 If  = 1 (ignoring back-gate effects): I = (K/2) ( 2(V gs - V T ) V ds - V ds 2 )

Detailed MOSFET Derivation I =  Q(x) E(x) Current is constant through the channel (no loss) ( E(x) = Electric Field ) Q(x) = C T (  (V g - V T ) - V(x) ) C T = C D + C ox Q s = C T (  (V g - V T ) - V s ), Q d = C T (  (V g - V T ) - V d ) E(x) = - = (1 / C T ) d V(x) dx d Q(x) dx I = (  / C T ) Q(x) d Q(x) dx (  = C ox / C T )

Detailed MOSFET Derivation I = (K/2  ) ( (  (V g - V T ) - V s ) 2 - ( (  (V g - V T ) - V d ) 2 ) Integrate with respect to length: I = (  / C T ) Q(x) d Q(x) dx Q s = C T (  (V g - V T ) - V s ) Q d = C T (  (V g - V T ) - V d ) I L = (  / 2 C T ) Q(x) 2 | I = (  / 2 C T ) ( 1 / L) ( Q s 2 - Q d 2 ) K =  C ox (W/L) I = (  C T / 2 ) ( 1 / L) ( (  (V g - V T ) - V s ) 2 - (  (V g - V T ) - V d ) 2 )

MOSFET Equations I = (K/2) ( (V g - V T - V s ) 2 - (V g - V T - V d ) 2 ) Saturation: (Q d = 0) I = (K/2) (V gs - V T ) 2 When ignoring back-gate effects (we often do):  = 1 I = (K/2) ( 2(V gs - V T ) V ds - V ds 2 ) Above-Threshold: Subthreshold: I = I s e (1 – e ) V gs /U T -V ds /U T Saturation: ( V ds > 4 U T ) I = I s e V gs /U T (V d > V g - V T )

Output Characteristics of the Above-Threshold MOSFET Interpretation of large-signal model

MOSFETs G S D nFET G S D B pFET Gate voltage (V) Current (  A) K =  A/V 2 V T = 0.806

Drain Current - Gate Voltage

Drain Current --- Source Voltage Gate voltage (V) sqrt(Drain current (  A))  (V g - V T ) = K/  =  A/V 2 (  = 0.54) (  = 0.7)

An Ohmic MOSFET I = (K/2  ) ( (  (V g - V T ) - V s ) 2 - (  (V g - V T ) - V d ) 2 ) If V d ~ V s, (small difference) (V d - V s = 50mV) I = K (V g - V T )(V d - V s )

A MOSFET in Saturation Saturation: Q d = 0 I = (K/2  ) ( (  (V g - V T ) - V s ) 2 V s = 0 I = (K  /2) (V g - V T ) 2

More Ohmic Region Data I = (K/2  ) ( (  (V g - V T ) - V s ) 2 - (  (V g - V T ) - V d ) 2 ) Take the derivative of I with respect to V d (V s = 0 ) dI / d V d = (K/2  )( 0 - (-2) (  (V g - V T ) - V d ) ) = (K/2  )(  (V g - V T ) - V d )

Influence of V DS on the Output Characteristics

Current versus Drain Voltage Not flat due to Early effect (channel length modulation) I d = I d (sat) (1 + (V d /V A ) ) or I d = I d (sat) e Vd/VA R out I d (sat) GND I out

Early Voltage Length Dependence Width of depletion region depends on doping, not L Might expect Vo to linearly vary with L

Small-Signal Modeling gmVgmVroro V3V3 V2V2 V2V2 V1V1 +V-+V- V3V3 V2V2 V1V1 V3V3 V2V2 V1V1 gmgm roro Above VT MOSFET Sub VT MOSFET AvAv I I I / U T 2I / ( V 1 -V 2 -V T )V A / I V A / U T 2V A / ( V 1 -V 2 -V T )

Small-Signal Modeling gmVgmVroro V3V3 V2V2 V2V2 rr V1V1 +V-+V- V3V3 V2V2 V1V1 V3V3 V2V2 V1V1 gmgm roro rr BJT Above VT MOSFET Sub VT MOSFET AvAv   (U T  ) / I I I I / U T 2I / ( V 1 -V 2 -V T ) V A / I V A / U T 2V A / ( V 1 -V 2 -V T )

Capacitances in a MOSFET

MOSFET Depletion Capacitors

Overlap Capacitances

Capacitance Modeling

Velocity Saturation Ideal Drift (Ohm’s Law) Si Crystal Velocity Limit

Effect of Velocity Saturation L = 76 nm MOSFET VTVT Square-law region

Small-Signal Modeling (with kappa) gmVgmVroro V3V3 V2V2 V2V2 V1V1 +V-+V- V3V3 V2V2 V1V1 V3V3 V2V2 V1V1 gmgm roro Above VT MOSFET Sub VT MOSFET AvAv I I  I / U T 2I / ( V 1 -V 2 -V T )V A / I  V A / U T 2V A / ( V 1 -V 2 -V T )

Small-Signal Modeling (with kappa) gmVgmVroro V3V3 V2V2 V2V2 rr V1V1 +V-+V- V3V3 V2V2 V1V1 V3V3 V2V2 V1V1 gmgm roro rr BJT Above VT MOSFET Sub VT MOSFET AvAv   (U T  ) / I I I I / U T  I / U T 2I / ( V 1 -V 2 -V T ) V A / I V A / U T  V A / U T 2V A / ( V 1 -V 2 -V T )