MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

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MOS-AK, San Francisco, Dec. 13, The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara, U. Feldmann, and M. Miura-Mattausch Hiroshima University HiSIM Research Center Research Institute for Nanodevice and Bio Systems Graduate School for Advanced Sciences of Matter

MOS-AK, San Francisco, Dec. 13, Outline of Presentation 1.Introduction 2.Modeling Based on a Consistent Potential Distribution 3.Bulk MOSFET Model HiSIM2 4.Silicon-On-Insulator (SOI) MOSFET 5.Double-Gate MOSFET 6.MOS Varactor 7.High-Voltage Devices High-Voltage MOSFET Insulated Gate Bipolar Transistor (IGBT) 8.Thin-Film Transistor (TFT) 9.Conclusion

MOS-AK, San Francisco, Dec. 13, Basic Compact Model Approaches for the MOSFET Threshold-Voltage-Based Models (e. g. BSIM3, BSIM4) ● currents expressed as functions of applied voltages ● different equations for: - sub-threshold region - linear region - saturation region ● implicit equation for surface potential ● currents determined from drift and diffusion term of current density equation ● developed calculation methods for the surface potential: - iterative solution with the exact surface-potential equation ⇒ HiSIM - approximate explicit solution by 1 st & 2 nd order perturbation theory, after prior conditioning of the surface-potential equation ⇒ PSP New Generation of Surface-Potential-Based Models New Generation of Inversion-Charge-Based Models ● additional approximation to solve for inversion charge ⇒ EKV, BSIM5, ACM

MOS-AK, San Francisco, Dec. 13, (solved by SPICE) s Basic Equations for Potential-Based Device Model

MOS-AK, San Francisco, Dec. 13, Consistency Property of Surface-Potential Model The surface potential consistently determines charges, capacitances and currents under all operating conditions.  =  E: velocity : mobility = Q()Q()

MOS-AK, San Francisco, Dec. 13, Outline of Presentation 1.Introduction 2.Modeling Based on a Consistent Potential Distribution 3.Bulk MOSFET Model HiSIM2 4.Silicon-On-Insulator (SOI) MOSFET 5.Double-Gate MOSFET 6.MOS Varactor 7.High-Voltage Devices High-Voltage MOSFET Insulated Gate Bipolar Transistor (IGBT) 8.Thin-Film Transistor (TFT) 9.Conclusion

MOS-AK, San Francisco, Dec. 13, Development History of Bulk-MOSFET Model HiSIM 1990 JJAP Sub-1  m MOSFETs short-channel effect model 1991 SISPAD “ 1 st surface-potential-based model parameter extraction strategy 1994 ICCAD “ simulation time & stability verification 1995 Siemens Flash-EEPROM concurrent device/circuit development 1998 STARC 100-nm MOSFET collaboration start Release Activity 2001 Oct. release to vendors HiSIM1.0.0 source code and manual 2002 Jan. release to public “ “ Oct. “ HiSIM1.1.1 “ 2003 Oct. Test release to STARC clients HiSIM2.0.0 source code and manual 2005 May release to CMC members HiSIM2.0.0 “ July “ + Verilog-A code Oct. “ HiSIM2.2.0 “ 2006 Jan. release to EDA vendors HiSIM March “ HiSIM Sept. release to CMC membersHiSIM2.4.3 eval. for standardization

MOS-AK, San Francisco, Dec. 13, Modeled Phenomena in HiSIM2.4.3 [ Phenomena] [Subjects] Short Channel: Reverse-short Channel: impurity pile-up pocket implant Poly-Depletion: Quantum-Mechanical: Channel-Length Modulation: Narrow-Channel: Temperature Dependency: thermal voltage bandgap n i phonon scattering maximum velocity Mobility Models: universal high Field Shallow-Trench Isolation: threshold voltage mobility leakage current Capacitances: intrinsic overlap lateral- field induced fringing Binning Option DFM Option [Phenomena] [Subjects] Non-Quasi-Static: transient time-domain AC frequency-domain Noise: 1/f thermal induced gate cross- correlation Leakage Currents: substrate current gate current GIDL current Source/Drain Resistances: Junction Diode: currents capacitances

MOS-AK, San Francisco, Dec. 13, HiSIM’s Surface Potentials at Source and Drain The absolute values of the HiSIM surface potential compare well with 2D simulation. Basic Surface-Potential Equation Iterative HiSIM Solution in Comparison to 2D-Devices Simulation

MOS-AK, San Francisco, Dec. 13,  SL saturates Surface-Potential Dependence on Applied Voltages

MOS-AK, San Francisco, Dec. 13, Bias Dependence & Derivatives of Surface Potential HiSIM accurately reproduces even the bias dependence of the surface-potential derivatives.

MOS-AK, San Francisco, Dec. 13, I ds vs. V x I ds / V x vs. V x I ds 2 / V x 2 vs. V x I ds 3 / V x 3 vs. V x Gummel-Symmetry Properties (HiSIM243) model parameters: default

MOS-AK, San Francisco, Dec. 13, (approximating a quadratic potential distribution) M. Miura-Mattausch et al., IEEE TED, 48, p. 2449, Short-Channel-Effect Model

MOS-AK, San Francisco, Dec. 13, Including tail for high pocket- doping concentrations. H. Ueno et al., IEEE TED, 49, p. 1783, V th (V) Pocket-Implantation Model

MOS-AK, San Francisco, Dec. 13, Model Extraction for Advanced 45nm Technology HiSIM can model advanced 45nm technology very accurately without the necessity of binning. Measurement HiSIM W g /L g =2  m/200nm W g /L g =2  m/40nm

MOS-AK, San Francisco, Dec. 13, Current Derivatives for Advanced 45nm Technology The current derivatives of a 45nm technology can likewise be well reproduced with HiSIM. Measurement HiSIM W g /L g = 2  m/40nm

MOS-AK, San Francisco, Dec. 13, HiSIM’s Model Evaluation Time Iteration for surface-potential determination requires only a small fraction of the total model evaluation time.  S0 iteration  SL iteration intrinsic device characteristics total CPU extrinsic device characteristics Data: HiSIM2.4.0 V gs Arbitrary Units

MOS-AK, San Francisco, Dec. 13, Outline of Presentation 1.Introduction 2.Modeling Based on a Consistent Potential Distribution 3.Bulk MOSFET Model HiSIM2 4.Silicon-On-Insulator (SOI) MOSFET 5.Double-Gate MOSFET 6.MOS Varactor 7.High-Voltage Devices High-Voltage MOSFET Insulated Gate Bipolar Transistor (IGBT) 8.Thin-Film Transistor (TFT) 9.Conclusion

MOS-AK, San Francisco, Dec. 13, D-Device FOX BOX Determination of Involved Potentials

MOS-AK, San Francisco, Dec. 13, This Device does not show a floating body effect! I-V Curve Reproduction and Short-Channel Effect

MOS-AK, San Francisco, Dec. 13, /f-Noise Modeling

MOS-AK, San Francisco, Dec. 13, Comparison with 1/f-Noise in Bulk MOSFETs 1/f-Noise in the SOI-MOSFET is substantially increased!

MOS-AK, San Francisco, Dec. 13, Modeling of the Floating-Body Effect The floating-body effect is modeled on the basis of excess hole charge due to impact ionization.

MOS-AK, San Francisco, Dec. 13, Modeling of the Dynamic-Depletion Effect The dynamic-depletion effect is accurately captured due to the consistently potential-based model concept.

MOS-AK, San Francisco, Dec. 13, Outline of Presentation 1.Introduction 2.Modeling Based on a Consistent Potential Distribution 3.Bulk MOSFET Model HiSIM2 4.Silicon-On-Insulator (SOI) MOSFET 5.Double-Gate MOSFET 6.MOS Varactor 7.High-Voltage Devices High-Voltage MOSFET Insulated Gate Bipolar Transistor (IGBT) 8.Thin-Film Transistor (TFT) 9.Conclusion

MOS-AK, San Francisco, Dec. 13, T si =40nm T si =20nm T si =10nm T si The floating body potential makes modeling difficult. gate V gs =1V V ds =0V gate Body potential is floating. T si carrier concentration Specific Features of the Double-Gate (DG) MOSFET

MOS-AK, San Francisco, Dec. 13, HiSIM-DG Accuracy for the Center Surface Potential The potentials at center and surface are determined with HiSIM-DG as accurately as in 2D-device simulation.

MOS-AK, San Francisco, Dec. 13, Short-Channel Effect in DG MOSFETs The drastic reduction of the short-channel effect is a big advantage of the double-gate MOSFET.

MOS-AK, San Francisco, Dec. 13, N sub T Si  s0 (V) Potential Dependence: Silicon Thickness and N sub

MOS-AK, San Francisco, Dec. 13, I ds -V gs Characteristics Reproduction

MOS-AK, San Francisco, Dec. 13, Reduction of T si has only a small influence on the capacitance. C-V Characteristics Reproduction

MOS-AK, San Francisco, Dec. 13, Influence of Q b cannot be ignored. T SI =10nm, T ox =1nm, L g =1um, V ds =50mV Impurity-Concentration Dependence of V th

MOS-AK, San Francisco, Dec. 13, Outline of Presentation 1.Introduction 2.Modeling Based on a Consistent Potential Distribution 3.Bulk MOSFET Model HiSIM2 4.Silicon-On-Insulator (SOI) MOSFET 5.Double-Gate MOSFET 6.MOS Varactor 7.High-Voltage Devices High-Voltage MOSFET Insulated Gate Bipolar Transistor (IGBT) 8.Thin-Film Transistor (TFT) 9.Conclusion

MOS-AK, San Francisco, Dec. 13, Structure of the Accumulation-Mode MOS-Varactor

MOS-AK, San Francisco, Dec. 13,  is inverse proportional to the electric field. Carrier-Movement Delay in Accumulation Mode

MOS-AK, San Francisco, Dec. 13, Frequency Dependence of MOS-Varactor Capacity

MOS-AK, San Francisco, Dec. 13, Outline of Presentation 1.Introduction 2.Modeling Based on a Consistent Potential Distribution 3.Bulk MOSFET Model HiSIM2 4.Silicon-On-Insulator (SOI) MOSFET 5.Double-Gate MOSFET 6.MOS Varactor 7.High-Voltage Devices High-Voltage MOSFET Insulated Gate Bipolar Transistor (IGBT) 8.Thin-Film Transistor (TFT) 9.Conclusion

MOS-AK, San Francisco, Dec. 13, High-Voltage MOSFET Structures (Asymmetric)(Symmetric) Public/Release Activities for HiSIM_HV Model 2006 Oct. candidate for CMC standardization 2007 Dec. selected for CMC standardization 2008 June HiSIM_HV1.0.2 release (evaluated as first standard version) 2008 Dec.HiSIM_HV1.0.2 named CMC standard model

MOS-AK, San Francisco, Dec. 13, Channel-Length Modulation Overlap Capacitance Beyond Gradual-Channel Approximation HiSIM for Bulk-MOSFET Complete Surface-Potential-Based Model  S0 : at source edge  SL : at the end of the gradual-channel approx.  S(  L) : at drain edge (calculated from  SL ) HiSIM2 Properties Facilitating Extension to HV-MOS

MOS-AK, San Francisco, Dec. 13, L drift N drift Potential drop in the drift region All important potential values are known. No sub-circuit for the potential drop is necessary. Consistent Potential Drop Modeling in Drift Region

MOS-AK, San Francisco, Dec. 13, HiSIM reproduces  S(  L) calculated by 2D-device simulator. : potential determining LDMOS characteristics  S(  L)  S(  L) [V]  S(  L)  S(  L) [V] V gs [V] V ds [V] Consistency Evaluation of Key Potential Values HV

MOS-AK, San Francisco, Dec. 13, Good agreement between HiSIM-HV results and 2D-device simulation results is achieved. : 2D-Device Simulation Results : HiSIM-HV Results I d [A] V ds =20V V ds =10V V ds =5V V ds =0.1V g m [S] Accuracy Comparison of I d -V gs

MOS-AK, San Francisco, Dec. 13, Quasi-saturation behavior of LDMOS is reproduced. : 2D-Device Simulation Results : HiSIM-HV Results I d [A] V gs =2.5V V gs =5V V gs =7.5V V gs =10V g d [S] Accuracy Comparison of I d -V ds

MOS-AK, San Francisco, Dec. 13, L drift = 1.5  m V ds = 10V Charge in the drift region is modeled explicitly. Vgs [V] Reproduction of Key Capacitance Features HV

MOS-AK, San Francisco, Dec. 13, Capacitance [fF] V gs [V] Reproduction of Intrinsic Capacitances V gs [V] Capacitance [fF] C gb C gg C gd C gs V ds =0V Asymmetrical LDMOS Symmetrical HVMOS HiSIM-HV is capable to reproduce all intrinsic capacitances with good accuracy.

MOS-AK, San Francisco, Dec. 13, n - (base) Schematic structure of a modern trench-IGBT Simplified circuit diagram of the HiSIM-IGBT model Consistent potential extension in HiSIM-IGBT is achieved by calculation based on Kirchhoff’s laws. Concept of the HiSIM-IGBT Compact Model JnJn

MOS-AK, San Francisco, Dec. 13, Fitting Results for the I-V Characteristics of the IGBT HiSIM-IGBT achieves accurate reproduction of the IGBT’s I-V characteristic and also scales with the base doping. M. Miyake et al., “A Consistently Potential Distribution Oriented Compact IGBT Model”, IEEE PESC, pp , June 2008

MOS-AK, San Francisco, Dec. 13, Outline of Presentation 1.Introduction 2.Modeling Based on a Consistent Potential Distribution 3.Bulk MOSFET Model HiSIM2 4.Silicon-On-Insulator (SOI) MOSFET 5.Double-Gate MOSFET 6.MOS Varactor 7.High-Voltage Devices High-Voltage MOSFET Insulated Gate Bipolar Transistor (IGBT) 8.Thin-Film Transistor (TFT) 9.Conclusion

MOS-AK, San Francisco, Dec. 13, Typical structure of the poly-Si TFT Concept of the Thin-Film-Transistor (TFT) Model Effect of Traps on the I-V characteristic TFT modeling is based on including the trap charge in the Poisson equation. S. Miyano et al., “A surface potential based Poly-TFT model for circuit simulation”, IEEE SISPAD, Sept. 2008

MOS-AK, San Francisco, Dec. 13, Accurate reproduction of I-V characteristic and scaling with gate length is achieved. Reproduction of Fabricated TFT-Device Data S. Miyano et al., “A surface potential based Poly-TFT model for circuit simulation”, IEEE SISPAD, Sept. 2008

MOS-AK, San Francisco, Dec. 13, Conclusion ●HiSIM2 is a compact surface-potential-based MOSFET model with a minimum number of approximations, due to its iterative surface-potential determination. ●HiSIM2 allows to preserve a consistent potential-based modeling in its extension to other integrated-device structures containing a MOSFET core. A compact-model family covering all integrated devices containing a MOSFET core and sharing the same modeling concepts could be developed.