October 10, 20001
2 Enabling USB 2.0 Peripherals Brad Hosler USB Engineering Manager Intel Corporation
October 10, What Is Peripheral Enabling? w Making sure that developers have: – Training – USB 2.0 Building Blocks – Tools – Services w Help vendors deliver a successful and robust USB 2.0 product
October 10, Training w That’s what this Developer Conference is all about w Early developers get One-on-One interactions – Peripheral Integration Lab w Other opportunities: – Compliance Workshops
October 10, Building Blocks: USB 2.0 Microcontroller w Concentrate on product function w Write some firmware Micro Con- troller Product Function USB 2.0
October 10, Building Blocks: Discrete Transceiver w Transceivers with or without Serial Interface Engine (SIE) w Concentrate on product function Tran- sceiver Product Function USB 2.0
October 10, Building Blocks: Transceiver Macrocell ASICASIC Serial Interface Engine Device Specific Logic Endpoint Logic … SIE Control Logic USB 2.0 Endpoint Logic Device Hardware USB 2.0 Transceiver Defines Standard Interface for Transceiver Macrocell w USB2 Transceiver Macrocell Interface (UTMI) specification posted on Intel web site – w Broad Industry support
October 10, Building Blocks: VHDL (IP) Cores ASICASIC Serial Interface Engine Device Specific Logic Endpoint Logic … SIE Control Logic USB 2.0 Endpoint Logic Device Hardware USB 2.0 Transceiver Tran- sceiver Product Function USB 2.0 3rd Party VHDL
October 10, Tools: Peripheral Developers Kit w Provides host functionality before systems are readily available w Peripheral Develop Kit (PDK) includes: – USB 2.0 Host Controller on PCI add-in card – USB SW stack to allow at-speed testing u Windows 2000 stack developed by Microsoft – USB 2.0 Transaction generation software u Allows single transactions to be generated
October 10, Tools: USB 2.0 HC PCI Card w PCI card with 5 ports – Uses NEC silicon – Full EHCI implementation w Cards from other vendors will be made available when ready
October 10, Tools: Single Transaction Tool w Very useful for early device debug w Doesn’t require a device to enumerate w Any type of transaction can be generated – Including individual parts of Control transfers w Demo
October 10, Tools: PDK Availability w Available now w Can be ordered through the USB-IF web pages – See the developers section
October 10, Tools: Compliance Device w USB2.0 device targeted for testing host controllers and hubs w Supports no-NAK INs and OUTs w Supports Loopback w Flags gaps in Isoch streams w Limited availability Add picture here
October 10, Tools: Bus Analyzers w Available now w See showcase area w Catalyst – w CATC – w Crescent Heart – w Data Transit –
October 10, Services: Peripheral Integration Lab w Integration lab at Intel’s Architecture Labs in Oregon – Multiple hosts and devices (interop testing) – Test equipment (scopes, analyzers, TDRs, etc.) – Expert help from HW and SW engineers – Compliance testing w Available to anyone planning on delivering USB 2.0 device by Q2’01 w Contact Dan Froelich –
October 10, Summary w Building blocks, tools and services are in place NOW for USB 2.0 peripheral development – USB 2.0 Building Block Vendor List on usb.org w Be a market leader by getting a jumpstart on the competition w Use the Peripheral Integration Lab to do early debug and validation of your product