Bipolar Junction Transistors (BJTs) 1.

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Presentation transcript:

Bipolar Junction Transistors (BJTs) 1

Electronics Concept

THE PAST 1904 Flemming 1906 De Forset Vacuum Tubes not reliable invented a value-Diode Cathode & Anode Positive voltages at Anode; current flows Negative voltages at Anode; No current flows Acted as Detector 1906 De Forset Put a third electrode in between and small change in voltage on the grid resulted in a large plate voltage change. Acted as an amplifier Vacuum Tubes not reliable

Solid State Components December 1947 Closely space two gold-wires probes were pressed into the surface of a germanium crystal and amplification of input voltages experienced. Low gain, low bandwidth and Noisy 1947 - 1950 Junction Transistor invented where the operation depended upon diffusion instead of conduction current. Had charged carrier of both polarities -- Electron and Holes 1951 Solid state transistors were produced commercially. Transistor characteristics vary greatly with changes in temperature. Germanium had excessive variations above 750 C, thus Silicon transistor were invented as Silicon Transistors could be used up to 2000 C

Semi Conductor Concept

Solid State Physics

The Integrated Circuit 1958 Kilby conceived the monolithic idea – Building entire circuit out of Germanium or Silicon Phase-Shift Oscillator, Multivibrator were build from Germanium with thermally bonded gold connecting wires. Noyce manufactured multiple devices on a single piece of Silicon and was able to reduced the size, weight and cost per active element.

Technological Advances 1960 - Small Scale Integration (SSI) less than100 components per chip 1966 - Medium Scale Integration (MSI) More than 100 less than 1000 components per chip 1969 - Large Scale Integration (LSI) More than 1000 less than 10,000 components per chip 1975 - Very Large Scale Integration (VLSI) More than 10,000 components per chip

INTRODUCTION - BJT Three terminal device Basic Principle Voltage between two terminals controls current flowing in the third terminal. Device is used in discrete and integrated circuits and can act as : Amplifier Logic Gates Memory Circuits Switches Invented in 1948 at Bell Telephone Industries

INTRODUCTION MOSFET has taken over BJT since 1970’s for designing of integrated circuits but still BJT performance under sever environment is much better than MOSFET e.g. Automotive Electronics BJT is used in Very high frequency applications (Wireless Comm) Very high speed digital logics circuit (Emitter Coupled Logic) Innovative circuit combine MOSFET being high-input resistance and low power operating devices with BJT merits of being high current handling capacity and very high frequency operation – known as BiMOS or BiCMOS

INTRODUCTION Study would include Physical operation of BJT Terminal Characteristics Circuit Models Analysis and design of transistor circuits

A simplified structure of the npn transistor. sedr42021_0501.jpg

Device Structure & Physical Operation npn & pnp Transistor Three terminal ---- Emitter, Base, Collector Consists of two pn junctions np-pn -------- npn pn-np -------- pnp Modes Cutoff, Active, Saturation, Reverse Active Junctions Emitter Base Junction (EBJ) Collector-Base Junction (CBJ)

TWO EXAMPLES OF DIFFERENT SHAPES OF TRANSISTOR

A simplified structure of the npn transistor. sedr42021_0502.jpg

Current flow in an npn transistor biased to operate in the active mode. sedr42021_0503.jpg

Notation Summarized vB (vC) iB (iC) VB (VC) IB (IC) vb (vc) ib (ic) Base (collector) Voltage with respect to Emitter Base (collector) Current toward electrode from external circuit Instantaneous Total Value (DC + AC) vB (vC) iB (iC) Quiescent Value (DC) VB (VC) IB (IC) Instantaneous Value of varying component (AC) vb (vc) ib (ic) Effective Value of varying components Vb (Vc) Ib (Ic) Supply Voltage (Magnitude) VBB (VCC)  

npn Transistor Current in Forward biased junction in active mode: Emitter Current (IE) flows out of the emitter Base Current (IB) flows into the Base Collector Current (IC) flows into the Collector Majority carriers are electrons as emitter junction is heavily doped and is wider than the base junction, and base junction being lightly doped and has smaller area.

Current Flow EBJ – Forward Biased, CBJ – Reversed Biased Only diffusion current is considered as drift current due to thermally generated minority carriers is very small. Current components across the EBJ are due to: Electrons injected from the emitter into the base This current component is at higher level due to heavily doped emitter High density of electrons in emitter Holes injected from the base into the emitter This current component is small due to lightly doped base Low density of holes in base

Current Flow Electrons concentration will be the highest at the emitter side and lowest (zero) at the collector side. Electrons concentration npo Thermal equilibrium value of Electrons minority carries in the base region Zero concentration at the collector side is due to positive charge at the collector will be cause electrons to be swept across the CBJ depletion region

Profiles of minority-carrier concentrations in the base and in the emitter of an npn transistor operating in the active mode: vBE > 0 and vCB ³ 0. sedr42021_0504.jpg

Electrons Diffusion Current AE Cross sectional area of the EBJ q Magnitude of electrons charge DE Electrons Diffusivity in the base W Effective width of the base ni Intrinsic Carrier Density NA Doping concentration in the base Some of the electrons would be lost due to recombination with the holes in the base, but quite small Recombination will cause excess minority carriers concentration to take slightly concave shape

npn Transistor : Collector Current IC is independent of VCE, as long as the CBJ is reversed biased – collector is positive w.r.t base IS (Saturation Current) is Inversely proportional to the base width Directly proportional to the area of the EBJ Typical range 10 -12 ---- 10 -18 A Varies with changes in temperature (Doubles @ every 50 C rise in temperature)

npn Transistor : Base Current iB1 due to the holes injected into emitter region iB2 due to holes that have to be supplied by the external circuit in order to replace the holes lost from the base through the recombination process

Base Current

npn Transistor : Base Current iB=iC/β β (Beta) Common emitter current gain Ranges from 50 –200 Constant for a particular transistor Influenced by : Width of the base junction (W) Relative doping of base region w.r.t. emitter region

npn Transistor : Emitter Current α (Common – Base Current Gain) is constant for a particular transistor Less or close to unity Small change in α corresponds to a very large change in β

Active Mode Parameters npn Transistor

Large-signal equivalent-circuit models of the npn BJT operating in the forward active mode. sedr42021_0505a.jpg

Common parameters npn & pnp BJT

Cross-section of an npn BJT. sedr42021_0506.jpg

Structure of Actual Transistor Collector surrounds Emitter, thus making it difficult for the electrons injected into the thin base to escape being collected In this way, the resulting αF ≈ Unity and βF is large. Structure is not symmetrical so by inter-changing emitter with collector, transistor will operate in reverse mode, resulting in its α and β will be αR and βR and would be lower than αF and βF

Structure of Actual Transistor Typical Value are αR 0.01 to 0.5 βR o.o1 to 1 CBJ is much large than the EBJ Collector Diode Dc represents CBJ and has a scale current of ISC and ISC >> ISE of Emitter diode DE Relationship αF ISE = αR ISC=IS

Model for the npn transistor when operated in the reverse active mode (i.e., with the CBJ forward biased and the EBJ reverse biased). sedr42021_0507.jpg

Equivalent Circuit model vBE – forward biased EBJ causing an exponentially related current iC to flow iC is independent of value of the collector voltage as long as CBJ is reversed biased. vCB ≥ 0 V Collector terminal behaves as an ideal constant current source and its value is determined by vBE iC = αiE

Equivalent Circuit model DE has a scale current ISE = IS/αF iC ---- Non Linear voltage controlled current source Can be converted into current controlled current source with controlled source being αFiE Transistor is used as two port device Input port Emitter & Base Output port Collector & Base

The Ebers – Moll (EM) Model Predicts operation of BJT in all possible modes

The Ebers-Moll (EM) model of the npn transistor. sedr42021_0508.jpg

The iC –vCB characteristic of an npn transistor fed with a constant emitter current IE. The transistor enters the saturation mode of operation for vCB < –0.4 V, and the collector current diminishes. sedr42021_0509.jpg

Current flow in a pnp transistor biased to operate in the active mode. sedr42021_0511.jpg

Large-signal model for the pnp transistor operating in the active mode. sedr42021_0512.jpg

Current flow in a pnp & npn transistor biased to operate in the active mode. sedr42021_0511.jpg

Large-signal model for the pnp & npn transistor operating in the active mode. sedr42021_0512.jpg

Circuit symbols for BJTs. sedr42021_0513a.jpg

Active Mode Parameters pnp Transistor

npn - pnp Transistor

Comparison BJTs

Operation in Active mode vBE has a range of 0.6 and 0.8 V vCB is negative so evCB/VT << 1 and can be neglected. Normally second term on the right hand is small and can be neglected to get equations as shown

Actual active mode vBE > 0.5V vCB < - 0.4V iC remain constant at αFiE for vCB going negative to approx -0.4 V. Below vCB =-0.4V, CBJ begins to conduct sufficiently– the transistor leaves the active mode and enters into saturation mode, where iC decreases.

Operation in Saturation Mode is lower below -0.4v BJT enters into the saturation mode of operation Increasing in the negative direction, that is, increasing the forward based voltage of CBJ reduced

Voltage polarities and current flow in transistors biased in the active mode. sedr42021_0514a.jpg

The transistor has β = 100 and exhibits a vBE of 0.7 V At Ic = 1mA. Example 5.1. The transistor has β = 100 and exhibits a vBE of 0.7 V At Ic = 1mA. Design a circuit so that a current of 2 mA flows through the collector and voltage drop of +5V appears at the collector sedr42021_0515a.jpg

Example 5.1. sedr42021_0515a.jpg

Example 5.1. sedr42021_0515a.jpg

Exercise 5.1

Exercise 5.4

In the circuit, the voltage at the emitter Figure E5.10 In the circuit, the voltage at the emitter was measured and found to be – 0.7 V. If β = 50, find IE, IC, IB, & VC, sedr42021_e0510.jpg

Problem 5-19 A pnp power transistor operates with VEC = 5V iE = 10 A vEB = 0.85 V (a) For β = 15 , What base current is required? (b) What is IS for this transistor? (c) Compare EBJ area of this transistor with that of a small signal transistor that conducts iC=1mA with vEB =0.7 V. How much larger it is?

Solution 5-19

Exercise 5.11 Find

Solution Exercise 5-11

Figure P5.20 sedr42021_p05020a.jpg

Problem 5-20 (d)

Solution Problem 5-20(d)

sedr42021_p05021a.jpg Figure P5.21

Solution Problem 5.21(c)

Figure 5.16 The iC –vBE characteristic for an npn transistor. sedr42021_0516.jpg

Figure 5. 17 Effect of temperature on the iC–vBE characteristic Figure 5.17 Effect of temperature on the iC–vBE characteristic. At a constant emitter current (broken line), vBE changes by –2 mV/°C. sedr42021_0517.jpg

The iC–vCB characteristics of an npn transistor. sedr42021_0518a.jpg

Common Base Characteristics iC – vCB for various iE Base at constant voltage – grounded thus acts a common terminal potential Curve is not horizontal straight line but has a small positive slop. iC depends slightly on vCB At relatively large vCB, iC shows rapid increases – Breakdown phenomena curve

Common Base Characteristics Intersects the vertical axis at a current equal to Small signal or incremental can be determined by due to at constant

The Early Effect In real world (a) Collector current does show some dependence on collector voltage (b) Characteristics are not perfectly horizontal line iC - vCE

Figure 5.19 (a) Conceptual circuit for measuring the iC –vCE characteristics of the BJT. (b) The iC –vCE characteristics of a practical BJT. sedr42021_0519.jpg

Common Emitter Configuration Emitter serves as a common terminal between input and output terminal Common Emitter Characteristics (ic-vCE) can be obtained at different value of vBE and varying vCE (dc), Collector current can be measured

The Early Effect vCE < - 0.4 V CBJ become forward biased & BJT leaves active mode & enters saturation mode Characteristics is still a straight line but with a finite slope when extra-polated, the characteristics lines meet at a point on the negative vCE axis @ vCE = -VA Typical value of VA ranges 50-100v & called early voltage, after the name of english scientist JM Early

The Early Effect At given vBE , increasing vCE increases reverse biased voltage on CBJ & thus depletion region increases, Resulting in a decrease in the effective base width W Is is inversely proportional to the base width Is increases , and Ic also increases proportionally called Early Effect

The Early Effect

Figure 5.20 Large-signal equivalent-circuit models of an npn BJT operating in the active mode in the common-emitter configuration. sedr42021_0520a.jpg

sedr42021_0521.jpg Figure 5.21 Common-emitter characteristics. Note that the horizontal scale is expanded around the origin to show the saturation region in some detail.

sedr42021_0522.jpg Figure 5.22 Typical dependence of b on IC and on temperature in a modern integrated-circuit npn silicon transistor intended for operation around 1 mA.

sedr42021_0523.jpg Figure 5.23 An expanded view of the common-emitter characteristics in the saturation region.

sedr42021_0524a.jpg Figure 5.24 (a) An npn transistor operated in saturation mode with a constant base current IB. (b) The iC–vCE characteristic curve corresponding to iB = IB. The curve can be approximated by a straight line of slope 1/RCEsat. (c) Equivalent-circuit representation of the saturated transistor. (d) A simplified equivalent-circuit model of the saturated transistor.

sedr42021_0525.jpg Figure 5.25 Plot of the normalized iC versus vCE for an npn transistor with bF = 100 and aR = 0.1. This is a plot of Eq. (5.47), which is derived using the Ebers-Moll model.

Table 5.3 Symbols & Large Signal Model sedr42021_tb0503a.jpg

Table 5.3 Symbols & Large Signal Model sedr42021_tb0503a.jpg

npn Transistor

pnp Transistor

Common Emitter Configuration sedr42021_0526a.jpg

Basic common-emitter amplifier circuit. Transfer characteristic of the circuit The amplifier is biased at a point Q, A small voltage signal vi is superimposed on the dc bias voltage VBE. The resulting output signal vo appears superimposed on the dc collector voltage VCE. The amplitude of vo is larger than that of vi by the voltage gain Av.

Common Emitter Configuration vi Input signal applied between base & emitter vBE = vi (Bias + Signal) vo Output voltage taken between collector & emitter (ground) vo = vCE (Bias + Signal) VCC Power supply needed to (a) to bias BJT (b) to supply the power needed for the operation of amplifier RC (a) to establish a desired dc bias voltage at the collector (b) to convert the collector signal current ic to an output voltage vo or vCE sedr42021_0526a.jpg

Large Signal Operation : CE Amplifier Cutoff Mode (a) BJT is Cutoff (b) ic is negligibly small (c) vo=vCE Active Mode (a) BJT conducts (b) ic increases (c) vo decreases Steeper Slope due to exponential term Active Mode Operation ends when vCE = 0.4V

Large Signal Operation : CE Amplifier vCE < 0.4V Saturation Mode Further increase in vBE causes vCE to decrease only slightly. vCE= vCE sat =0.1 to 0.2V Current remain constant ICsat = (vCC - vCE sat ) / RC RCEsat = vCE sat / ICsat = very small thus short circuit. Switch is closed. Cutoff Ro = ∞ Switch is controlled by Sat Ro = 0 the base current

Large Signal Operation : CE Amplifier Saturated BJT exhibits a very small resistance RCEsat

Amplifier Gain BJT as a linear Amplifier – no distortion, no clipping, clamping / Limiting. Biased point in Active region Quiescent Point (Q point) DC base-emitter voltage VBE and DC collector-emitter voltage VCE @ ‘Q’ Point

Amplifier Gain

Amplifier Gain Small Signal to be applied at Base Small gain can be found by differentiating

Amplifier Gain CE amplifier Av = -VRC/VT Inverting Amplifier output is 1800 out of phase relative to input signal Voltage gain of CE amplifier is ratio of voltage drop across Rc to threshold voltage (VT = 25mV) To maximize voltage gain use as large as voltage drop across Rc as possible. For a given VCC, to increase VRC operate at a lower VCE. But limited by amplitude of input signal Lowering or increasing ‘Q’ point –ve or +ve signal amplitude may take amplifier into saturation or cutoff Mode. so Clipping will take place Placing ‘Q’ point too high Av is reduced. as Placing ‘Q’ point @ Saturation Av is increase

Figure 5.27 Circuit whose operation is to be analyzed graphically. sedr42021_0527.jpg Little Practical Value

Graphical Analysis Procedure Determine dc bias point Calculate dc base current IB ic – vCE curve define ‘Q’ point

Figure 5.28 Graphical construction for the determination of the dc base current sedr42021_0528.jpg

Figure 5.29 Graphical construction for determining the dc collector current IC and the collector-to-emitter voltage VCE sedr42021_0529.jpg

Figure 5.30 Graphical determination of the signal components vbe, ib, ic, and vce when a signal component vi is superimposed on the dc voltage VBB sedr42021_0530a.jpg

Figure 5.30 Graphical determination of the signal components vbe, ib, ic, and vce when a signal component vi is superimposed on the dc voltage VBB sedr42021_0530a.jpg

Figure 5.31 Effect of bias-point location on allowable signal swing: Load-line A results in bias point QA with a corresponding VCE which is too close to VCC and thus limits the positive swing of vCE. At the other extreme, load-line B results in an operating point too close to the saturation region, thus limiting the negative swing of vCE. sedr42021_0531.jpg

Figure 5.32 A simple circuit used to illustrate the different modes of operation of the BJT. sedr42021_0532.jpg

Operation as a Switch Cutoff and saturation modes of operation vi less than 0.5 V the transistor is in cutoff mode, iB =o, iC=o, vC= VCC vi greater than 0.5 V (≈ 0.7V), the transistor conducts iB=(vi-VBE)/RB iC= βiB vC>vB-0.4 V …. vC=VCC – RCIC

Operation as a Switch

Operation as Switch

Operation as Switch vi increased, iB increased, ic will corresponding increase, vc will decreases till vc < vB – 0.4 vc = vB + vCB The Edge of Saturation

Operation as Switch

BJT circuit @ DC |VBE| = 0.7 V |VCE| = 0.2V VCE = VCB + VBE VCBsat =-0.4V VCE = VCB + VBE =-0.4+0.7=0.3V Saturation Mode Valid only in active mode

Figure 5.33 Circuit for Example 5.3. sedr42021_0533.jpg

Figure 5.34 Analysis of the circuit for Example 5.4 β = 100 sedr42021_0534a.jpg

Figure 5.34 Analysis of the circuit for Example 5.4 β = 100 sedr42021_0534a.jpg

Figure 5.35 Analysis of the circuit for Example 5.5. β = 50 β = 50 sedr42021_0535a.jpg

Figure 5.35 Analysis of the circuit for Example 5.5. β = 50 β = 50 sedr42021_0535a.jpg

Figure 5.36 Example 5.6: sedr42021_0536a.jpg

Figure 5.37 Example 5.7 β = 100 sedr42021_0537a.jpg

Figure 5.38 Example 5.8: β = 100 sedr42021_0538a.jpg

Figure 5.39 Example 5.9: β = 30 sedr42021_0539a.jpg

Figure 5.40 Circuits for Example 5.10. sedr42021_0540a.jpg

Figure 5.40 Circuits for Example 5.10.

Figure 5.41 Circuits for Example 5.11. sedr42021_0541a.jpg

Figure E5.30 sedr42021_e0530.jpg

Figure 5.42 Example 5.12: sedr42021_0542a.jpg

Problem 5.61 Consider the common-emitter amplifier circuit of Fig. 5.26(a) when operated with a supply voltage vcc= +5v What is the theoretical max. voltage gain that this amplifier can provide? What value VCE must this amplifier be biased at to provide voltage gain of -100 v/v? If the dc collector current lc at the bias point in (b) is to be 0.5 mA, what value of Rc should be used? What is the value of VBE required to provide the bias point mentioned above? Assume that the BJT has ls = 10-15A.

If a sine-wave signal vbe having a 5-mV peak amplitude is superimposed on VBE, find the corresponding output voltage signal vce that will superimposed on VCE assuming linear operation around the bias point? Characterize the signal current ic that will be superimposed on the dc bias current lc. What is the value of the dc base current ib at the bias point. Assume B(beta) = 100. characterize the signal current ib that will be superimposed on base current lB Dividing the amplitude of vbe by the amplitude of ib evaluate the incremental (or small-signal) input resistance of the amplifier.

Sketch and clearly label correlated graphs of vBE, vce,ic and iB Sketch and clearly label correlated graphs of vBE, vce,ic and iB. note that each graph consists of a dc or average value and a superimposed sine wave. Be careful of the phase relationships of the sine wave.

Problem 5.68 +6V Consider the operation of the circuit shown as vB rises slowly from zero. For this transistor, assume B(beta) = 50, vBE at which the transistor conducts is 0.5V, vBE when fully conducting 0.7V, saturation begins at vBC = 0.4V, and the transistor is deeply in saturation at vBC = 0.6V. For what range of vB is ic essentially zero? What are the value of vE, iE, iC and vC for vB = 1V and 3V? For what value of vB does saturation begin? What is iB at this point? For vB =4V and 6V,what are the values of vE, vC, iE, iC and iB? Augment your sketch by adding a plot of iB. vC vi ve

sedr42021_p05085.jpg Figure P5.85

Solution

sedr42021_p05085.jpg

Biasing of BJT Amplifier circuit Biasing to establish constant DC Collector current Ic & should be Calculatable Predictable Insensitive to temp. variations Insensitive to large variations in β To allow max. output signal swing with no distortion

Figure 5.43 Two obvious schemes for biasing the BJT: (a) by fixing VBE; (b) by fixing IB. sedr42021_0543a.jpg

Figure 5.44 Classical biasing for BJTs using a single power supply: Typical Biasing Single power supply Voltage Divider Network RE in Emitter Circuit sedr42021_0544a.jpg

Typical Biasing

Figure 5.44 Classical biasing for BJTs using a single power supply: sedr42021_0544a.jpg

Classical Discrete-circuit Bias arrangement

Base Emitter Loop

Classical Discrete-circuit Bias arrangement For stable Ic, IE must be stable as IC =αIE To make IE insensitive to VBE (temp.) & β variations VBB >> VBE RE>> RB/(β+1)

Classical Discrete-circuit Bias arrangement VBB >> VBE But for higher gain VRC should be more Larger signal Swing (before cutoff) Av=-VRC / VT VCB be large VCE is large for larger signed swing (before saturation) Compromise Role of thumb

Classical Discrete-circuit Bias arrangement RE>> RB/(β+1) For Stable IE - Negative Feed Back through RE If IE increases somehow, VRE increases, hence VE increases correspondingly, VBB = VBE + VE ; VBE decreases for maintaining constant VBB Reduces collector (Emitter) current. Stable IE

Figure 5.45 Biasing the BJT using two power supplies. sedr42021_0545.jpg

Two Power Supplies Version

Two Power Supplies Version

Two Power Supplies Version

Figure 5.46 (a) A common-emitter transistor amplifier biased by a feedback resistor RB. sedr42021_0546a.jpg

A common-emitter transistor amplifier biased by a feedback resistor RB. RB provide negative Feedback sedr42021_0546a.jpg

A common-emitter transistor amplifier biased by a feedback resistor RB.

A common-emitter transistor amplifier biased by a feedback resistor RB.

A BJT biased using a constant-current source I. sedr42021_0547a.jpg

Biasing using a constant current source Current in Emitter means Constant IC IC =α IE Independent of RB & β value thus RB can be made large to Increase Input resistance Large signal swing at collector Q1 acts as Diode CBJ is short circuits

Biasing using a constant current source Q1 acts as Diode CBJ is short circuits VCC-IREFR-VBE+VEE=0 I = IREF=(VCC-VBE+VEE)/R Since Q1 & Q2 have VBE is same I constant till Q2 in Active Mode (Region) & can be guaranteed by Voltage at collector V > (-VEE+VBE) Current Mirror

Biasing using a constant current source IE is independent of β & RB RB can be made large thus increasing input resistance Simple Design Q1 & Q2 are matched pair Q1 is Diode collector- Base connected β high IB can be neglected α = 1 IC = IE I = IREF=(VCC-VBE+VEE)/R