Chpt. 4d1 Bias-Point Location è Effect of load-line A è Effect of load-line B.

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Presentation transcript:

Chpt. 4d1 Bias-Point Location è Effect of load-line A è Effect of load-line B

Chpt. 4d2 Biasing BJT for discrete circuits è Biasing using a Single Power Supply è Biasing using Two Power Supplies è Biasing for common-emitter amplifiers è Biasing using a Current Source

Chpt. 4d3 Basic Single-Stage BJT : common-emitter amplifier è Circuit equivalent circuit (T-mode) eliminating r_0

Chpt. 4d4 Common-base Amplifier è Circuit equivalent circuit (T-model)

Chpt. 4d5 Common-collector Amplifier or Emitter Follower è Circuit equivalent circuit (T-model)

Chpt. 4d6 c-c or e-f amplifier (cont) è Equivalent circuit circuit to redrawn determine R_o

Chpt. 4d7 Transistor as a Switch-Cutoff è cutoff region è active region è saturation region è model for the Saturated BJT

Chpt. 4d8 EBERS-MOLL (EM) Model: large-signal model for BJT è npn transistor EM model