Lecture 2 Chapter 2 MOS Transistors

Voltage along the channel V(y) = the voltage at a distance y along the channel V(y) is constrained by the following relationship: 0<V(y)<V DS

Inversion Layer Charge In order to have any inversion layer charge, V GC > V T. Q=CV →Q n (y)=C ox (V GS -V(y)-V T ) [C ox ]=fF/μm 2

Current [C ox ]=fF/μm 2 Q n =charge density; [Q n ]= (fF V)/μm 2 v=carrier velocity; [v]=cm/s W=width; [W]=μm

Carrier Velocity v=carrier velocity; [v]=cm/sec μ=mobility; [μ]=cm 2 /(V-sec) E=electric field; [E]=V/cm Generic relationship between μ, v, and E

Electric Fields ExEx EyEy

Vertical Electrical Field (E x ) E x is approximately V DD /t ox

Reduced Mobility Due to E x For high gate voltages, the mobility of carriers decreases due to electron caused by dangling bond at the Si-SiO 2 interface Mathematically, the reduced mobility due to Ex can be modeled as μ e : effect of E x on the nominal mobility μ o : the nominal mobility

Horizontal Electric Field (E y ) E y is approximately V DS /L E y acts to – push the carriers to their velocity limit – Reduce carrier mobility

Carrier Velocity Vs. E y The slope of v versus E y is μ, the mobility.

Mathematical Modeling of E y μ e : effect of E x on the nominal mobility

Transistor in the Linear Region Assume that E y <E C Therefore,

Transistor in the Linear Region Left Side: 0 to L Right Side: 0 to V DS

Transistor in the Saturation Region Assume that E y > E C Therefore, v=v sat

Determine V DSAT Assumption: the current is the same throughout the channel→V(y)=VDS Solve for V DSAT by applying the boundary condition: I DS (triode)=I DS (sat) V DSAT =(V GS -V T )||LE C (See notes)

MOS Transistor in Saturation Substitute VDSAT for VDS in EQ (See Notes for details)

Application of Short Channel Device Model Determination of t PLH and t PHL

Inverter Delay Calculation Example 6.1 t p =propagation delay t p =C L (V DD )/(2I DSAT )=0.7R EQ (L/W)C L – R EQ =(V DD /2)/(0.7 I DSAT )

Significance of Leakage Power An increase in static power dissipation

Leakage Current Sources – Subthreshold conduction – Gate leakage – Junction leakage

Subthreshold Current The long-channel transistor I-V model assumes current only flows when V GS >V T In real transistors, current does not abruptly cut off below the threshold.

An Experiment to Create of Mobile and Immobile Charges

Physical Intuition of Subthreshold Current V B =V S =V D = 0V As V GS changes from 0 V to a positive value, positive charge accumulates on top of the gate and negative charge accumulates as electrons under the gate.

Immobile Charges Under the gate Initially, the negative charge in the p-type body is manifested by creation of a depletion region in which mobile holes are pushed under the gate, leaving behind negatively charged immobile (fixed) acceptor ions.

Mobile Charges Under the Gate As the gate voltage continues to increase, the depletion layer thickness increases and eventually an initial layer of mobile electrons appears at the surface of the silicon in the so-called weak inversion condition.

Definition of V T Further increases in the gate voltage increases the concentration of mobile carriers in the channel until the concentration of electrons at the surface equals the concentration of holes in the substrate, a condition known as strong inversion

Linear Increase in Mobile charge for V GS >V T For gate voltage above this point, the depletion layer thickness remains constant while the additional charge on the gate is matched by the additional mobile carriers in the channel drawn from source and drain.

Fixed Charge Vs. Mobile Charge

Mobile Charge on a Log Scale

Similarity to BJT An NPN Mobile minority carrier in the P region Contrast: The base potential is controlled through a capacitive divder.

Subthreshold Current Equation V t0, the threshold voltage Sensitivity to V ds v T is kT/q [Source: Weste]

Reduce I sub via V t0 V t0 controls the magnitude of the subthreshold current Trade off – Keep V t0 to lower subthreshold current – Price: VDD-Vt0 ↔Speed suffers Increase the substrate bias as a means to increase V t0, and thus reduce subthreshold current for inactive circuits – Difficult to implement for high speed circuits

Reduce I sub through T V T0 decreases when T increases Cooling reduces subthreshold current, but increases IDSAT. [Weste]

Application Thse subthreshold conduction is used to advantage in low power circuits The subthreshold current adversely dynamic circuits and DRAMs, which depend on the storage of charge on a capacitor

Gate Leakage Gate leaking is due to tunneling of charges through the oxide. Cox helps attract charge to the channel. By using hi K dielectric, thicker tox can be used to reduce gate leakge.

Leakage due to reverse diode current Usually negligible for digital applications