Introducing Zynq-7000 EPP The First Extensible Processing Platform Family March 2011
Embedded Designers are Asking For More More than a processor delivers… More than an ASIC or ASSP delivers… More than an FPGA delivers…
Next-Generation Embedded Processing The Need Higher Performance Lower Cost Lower Power Smaller Form Factor Greater Flexibility The Limitations Microprocessors have insufficient signal processing Multiple chip implementations are too expensive Multiple chip implementations use too much power Multiple chip implementations take up too much room ASICs/ASSPs cannot adapt to rapid changes in requirements and provide competitive differentiation What’s Needed is a New Class of Product
Current Selections Equal Compromise ASIC ASSP 2 Chip Solution Performance + Power - Unit Cost TCO Risk TTM Flexibility Scalability + positive, - negative, neutral Conflicting Demands Not Served
Introducing the Zynq™-7000 EPP Breakthrough Processing Platform High performance, low power Flexible and scalable solution Industry Standard Design Environments Well defined SW programming model Familiar SW & HW design flows Flexible Accelerators and IP Standard AMBA® AXI-4 interfaces Broad Ecosystem Support Tools, OS’s & IPs Middleware, codecs 7000 7010 30 7020 85 7030 125 7040 235 Familiar Processing System + Scalable Programmable Logic
Zynq-7000 Family Highlights Complete ARM®-based Processing System Dual ARM Cortex™-A9 MPCore™, processor centric Integrated memory controllers & peripherals Fully autonomous to the Programmable Logic Tightly Integrated Programmable Logic Used to extend Processing System Scalable density and performance Over 3000 internal interconnects Flexible Array of I/O Wide range of external multi-standard I/O High performance integrated serial transceivers Analog-to-Digital Converter inputs Memory Interfaces Processing System 7 Series Programmable Logic Common Peripherals ARM® Dual Cortex-A9 MPCore™ System Common Peripherals Custom Peripherals Common Accelerators Custom Accelerators Software & Hardware Programmable
Zynq-7000 Architecture
Complete ARM®-based Processing System Processor Core Complex Dual ARM® Cortex™-A9 MPCore™ with NEON™ extensions Single / Double Precision Floating Point support Up to 800 MHz operation High BW Memory Internal L1 Cache – 32KB/32KB (per Core) L2 Cache – 512KB Unified On-Chip Memory of 256KB Integrated Memory Controllers (DDR3, DDR2, LPDDR2, 2xQSPI, NOR, NAND Flash) AMBA Open Standard Interconnect High bandwidth interconnect between Processing System and Programmable Logic ACP port for enhanced hardware acceleration and cache coherency for additional soft processors Integrated Memory Mapped Peripherals 2x USB 2.0 (OTG) w/DMA 2x Tri-mode Gigabit Ethernet w/DMA 2x SD/SDIO w/DMA 2x UART, 2x CAN , 2.0B, 2x I2C, 2x SPI, 32b GPIO Processing System Ready to Program
Tightly Integrated Programmable Logic Built with State-of-the-art 7 Series Programmable Logic 28K-235K logic cells 430K-3.5M equivalent ASIC gates Note: ASIC equivalent gates based on analysis over broad range of designs Over 3000 Internal Interconnects Up to 100Gb of BW Memory-mapped interfaces Enables Massive Parallel Processing Up to 760 DSP blocks delivering over 900 GMACs Integrated Analog Capability Dual multi channel 12-bit A/D converter Up to 1Msps Scalable Density and Performance
Flexibility Beyond Any Standard Processing Offering Flexible External I/O 76 Dedicated Memory I/Os DDR3 / DDR2 / LPDDR2 Memory Interfaces Configurable as 16bit or 32bit 54 Dedicated Peripheral I/Os Supports integrated peripherals Static memory (NAND, NOR, QSPI) More I/Os available though the Programmable Logic High Performance Integrated Serial Tranceivers (Two largest devices only) Up to 12 transceivers Operates up to 10.3Gbs Supports popular protocols Integrated PCIe Gen2 block 350 Multi-standard and High Performance I/O Up to 200 3.3V capable multi-standard I/O Up to 150 high performance I/O Up to differential 17 ADC inputs Flexibility Beyond Any Standard Processing Offering
Zynq-7000 EPP Value Proposition ASIC ASSP 2 Chip Solution Zynq-7000 Performance + Power - Unit Cost TCO Risk TTM Flexibility Scalability + positive, - negative, neutral Conflicting Demands Now Served by the Zynq-7000 Family
Zynq-7000 Device Portfolio Summary Zynq-7000 EPP Devices Z-7010 Z-7020 Z-7030 Z-7040 Processing System Processor Core Dual ARM® Cortex™-A9 MPCore™ Processor Extensions NEON™ & Single / Double Precision Floating Point Max Frequency 800MHz Memory L1 Cache 32KB I / D, L2 Cache 512KB, on-chip Memory 256KB External Memory Support DDR3, DDR2, LPDDR2, 2x QSPI, NAND, NOR Peripherals 2x USB 2.0 (OTG), 2x Tri-mode Gigabit Ethernet, 2x SD/SDIO, 2x UART, 2x CAN 2.0B, 2x I2C, 2x SPI, 4x 32b GPIO Programmable Logic Approximate ASIC Gates ~430K (30k LC) ~1.3M (85k LC) ~1.9M (125k LC) ~3.5M (235k LC) Extensible Block RAM 240KB 560KB 1,060KB 1,860KB Peak DSP Performance (Symmetric FIR) 58 GMACS 158 GMACS 480 GMACS 912 GMACS PCI Express® (Root Complex or Endpoint) - Gen2 x4 Gen2 x8 Agile Mixed Signal (XADC) 2x 12bit 1Msps A/D Converter I/O Processor System IO 130 Multi Standards 3.3V IO 100 200 Multi Standards High Performance 1.8V IO 150 Multi Gigabit Transceivers 4 12
Zynq-7000 EPP Applications Mapping
Zynq-7000 Devices at Work in Automotive Driver Assistance Performance Complex system inputs drives signal processing performance demands Video cameras (>720p30 Multi-stream) Fusion with infrared sensors, radar sensors DSP & memory performance to meet even the most demanding DA application requirements Flexibility Emerging and evolving camera interface standards & DA application algorithms Scalability at right price point Enables unique sets of bundled features in a cost effective manner ASIC Z-7010 Z-7020 Performance + Power Unit Cost TCO Risk - TTM Flexibility Scalability Optimized for Performance, Flexibility and Scalability
Zynq-7000 EPP Driver Assistance Application
Zynq-7000 at Work in Industrial Applications Flexibility Need time to market, while enabling in-system programmability accommodating “future proofing” products Scalability Z-7010 – Z-7030 devices allow customers to offer support for various standards from a single platform Power, Size & Cost Power, Size and cost are critical requirements Addressed by integration and reconfigurability of the Programmable Logic Performance Integration and tight coupling of the processing System and Programmable Logic allows high bandwidth, low latency for real-time industrial networking and motor control hardware accelerators 2 Chip Solution Z-7010 Z-7020 Z-7030 Performance + Power - Unit Cost TCO Risk TTM Flexibility Scalability Scalable, Flexible, Power and Cost Efficient with the Right Level of Performance
Zynq-7000 Industrial Motor Control Application
Zynq-7000 Devices at Work in Broadcast Camera Performance Processing System to Programmable Logic interconnect enables high bandwidth for high accuracy video processing and analytics Required for high picture quality, high quality color grading system, high accuracy video/audio statistics system in broadcast camera Power Strict power dissipation budget requirements Flexibility Accommodates changing broadcast standards and future algorithms evolution Scalability Ability to target range of cameras: “Prosumer” to high-end professional 2 Chip Solution Z-7020 Z-7030 Z-7040 Performance + Power - Unit Cost TCO Risk TTM Flexibility Scalability High Performance, Power Efficient solution that is – Scalable and Flexible
Zynq-7000 EPP Broadcast Camera Application
Zynq-7000 EPP Platform Offering Applications OS Kernel High Level and Low Level Drivers Processing System Programmable Logic OS BSP’s Silicon Custom Libraries & APIs Reference Design & Board Partners Xilinx Simulators SW Development Tools SW & HW IP HW Development Tools More than just Silicon: A Comprehensive Platform Offering
Embedded Design Flow Using Zynq-7000 EPP Programming Integrate IP Test Debug Design Xilinx IP Partner IP Custom IP Software Developer Hardware Designer System Architect Industry-Leading Tools Xilinx SDK (Eclipse IDE, GNU) ARM Ecosystem Many Sources of SW IP Xilinx, ARM libraries 3rd Parties Industry-Leading Tools C-Gates / AutoESL System Generator VHDL/Verilog Many Sources of HW IP Standardized around AXI 3rd Parties Accelerates Application Development and TTM
Zynq-7000 EPP SW Development Environment Widely Used ARM Development Environment Easily migrate code already developed for ARM-based systems ARM Ecosystem Support ARM Xilinx Software Development Kit Other 3rd Parties Widely Available SW and Libraries Open source Commercially available Drivers and APIs Provided for a common set of peripherals and system functions Applications OS Kernel High Level and Low Level Drivers Processing System Programmable Logic OS BSP’s Silicon Custom Libraries & APIs
Zynq-7000 EPP HW Design Environment Xilinx ISE Development Suite Embedded Edition AutoESL HLS support Standard “FPGA” EDA Design tools HDL & HLS simulation & synthesis Plug & Play IP Portfolio AMBA® AXI enabled Applications OS Kernel High Level and Low Level Drivers Processing System Programmable Logic OS BSP’s Silicon Custom Libraries & APIs
Jump-Start Zynq-7000 EPP Developments Now Zynq-7000 EPP Emulation Platform First systems delivered: Summer 2010 Customers & partners developing SW, HW and IP Customer and Partner Activities Linux applications Android applications Video processing functions System interoperability testing CAN, USB, Ethernet, … Custom AMBA® AXI IP blocks 3rd party GNU & debugging tools ports And more… A Fast Track to Full System Design
Zynq-7000 Extensible Processing Platform Summary New Scalable Family of Devices Zynq-7000 EPP device portfolio Four devices for a broad range of applications Industry Standard Design Environments Well defined SW programming model Familiar HW design flow Flexible accelerators and IP Standard AMBA® AXI interfaces Broad and Expanding Ecosystem Tools, OS’s, IP Middleware, codecs … Availability Initial devices 2H CY2011 Production 2H CY2012 7000 7010 30 7020 85 7030 125 7040 235
For Further Details Learn more about the Zynq-7000 family Download the latest collateral from Xilinx.com Register for “be the first know” Contact your local sales rep View the online Zynq-7000 Videos Introduction to Zynq-7000 EPP: ARM & Xilinx joint video Emulation Platform demonstrations from Embedded World Partner and customer testimonials Learn more about our 28nm Programmable Logic Worlds first 28nm FPGA device already shipping since March 2011
Device Tables
Zynq-7000 EPP Device Table SW Developer’s View
Zynq-7000 EPP Device Table HW Designer’s View