January 29, Guy Moshe General Manager Design Creation BU/ESD Innovative Virtual Prototype Technologies for System and Application Bringup Innovative Virtual Prototype Technologies for System and Application Bringup

January 29, Market Trends Embedded systems are scaling rapidly: –Complex multi-core architectures (e.g. ARM big.LITTLE) –Large software stacks Embedded Software in critical path –Applications everywhere –User experience –Differentiates products: Mobile, Automotive, Networking…. –Higher cost and investment Opportunity: Companies are setting software infrastructure to drive future design and verification activities

January 29, What’s Changed in System Design? Software is fastest growing component of SoC development cost All this software requires a lot of analysis!

January 29, HW/SW Development Evolution HWSW Device HW & SW Junction Pain Here! Hardware Software interaction presents a significant system analysis challenge System / SOC CPU(s) Coprocessors Graphics Audio Network(s) GPIOs Custom IP Linux / RTOS Boot code Security layers System Config Drivers ISRs Application Code

January 29, Embedded System Traditional Flow “Host” Machine Embedded SW Device UI ™ Application Stacks Middleware, Agents Android ™ Linux ® Others ® IDE & Builder Compiler Debugger Profiler SW Developer Tools Probe Sequential delivery lifecycle (Late HW) Limited visibility & trace capacities Measurement affects behavior - Heisenberg Effect…. Rigid Setup

January 29, Executing on a Virtual Target “Host” Machine IDE & Builder Compiler Debugger Profiler CodeBench Virtual Edition GDB Peripherals TimerGPIO LCD Video DDR3PHY SDRAMBridge DMA USBETHERNET PCI EXPRESS GPU PHY MPEG CPU Embedded SW Device UI ™ Application Stacks Middleware, Agents Android ™ Linux ® Others ® Virtual “Target” Device UART A Virtual Prototype is a high-level simulation model of the target hardware Can execute unmodified software images (drivers, firmware, OS, applications) Run at close to real time speed Run with standard Toolchain’s and software IDE’s

January 29, Introducing Virtual Prototyping High-level simulation model of the SoC/System HW – Instruction set simulator executes code at close to real-time speed – Peripherals simulated with behavioral models – Host resources provide real world I/O Key values – Early availability of a hardware accurate model – Fast, deterministic execution of native embedded software – Full visibility & control – Software debug connection – May have various timing fidelities Virtual Prototype Peripherals TimerGPIO LCD Video DDR3PHY SDRAM Bridge DMA USBETHERNETPCI e GPU PHY MPEG CPU UART

January 29, Virtual Prototyping vs. HW Prot otypes SW IDE IDE & Builder Compiler Debugger Profiler Developer Tools VP Plug-in Control Analysis Trace Simulation Control Load & Restart Start/stop Simulation Control Load & Restart Start/stop Registers, Memory, IO’s CPU internals Cache logging Registers, Memory, IO’s CPU internals Cache logging Functional vs. Performance mode Application-level Power/Performance Analysis Functional vs. Performance mode Application-level Power/Performance Analysis VP Plug-in Operating System SW Virtual Prototype Peripherals TimerGPIOUART LCD Video DDR3PHY SDRAM BridgeDMAUSBETHERNET PCI EXPRESS GPU PHY MPEG CPU Reference Design Board Provides capabilities similar to HW prototype – Simulation speed close to Real Time (~100s of MIPS) – Configuration, Management & Manipulations – Debugging, Analysis & Profiling But provides superior capabilities on Virtual Prototype – Better simulation control – Better visibility & tracing – Better Analysi s

January 29, Delivers a target HW model executable to the software team – Integrate final application software with actual hardware architecture – Validate and debug software against early HW model before RTL – Tune software to meet performance and power requirements Virtual Prototype Executable Linux/Windows Cross Compile Linux/Windows Cross Compile End User Application Software End User Application Software CPU Subsystem CPU Subsystem AMBA AXI Bridge AMBA APB UART Slave GPIO Slave Memory DMA Memory DMA Master Ethernet Slave PHY LCD Master MPEG Master JPEG Slave Master Terminal Virtual Prototype wizard dialog for Virtual Prototype creation Virtual Prototype Creation Developer Tools

January 29, Deterministic System Execution Peripherals TimerGPIOUART Bridge DDR3 SDRAM PHY USBETHERNET PHY Interrupt Controller Timers Interrupt Controller Timers CPU 0 CPU 1 I- Cache D- Cache L2 cache + SCU I- Cache D- Cache Interrupt Controller Timers Interrupt Controller Timers CPU 0 CPU 1 I- Cache D- Cache L2 cache + SCU I- Cache D- Cache GPU Embedded SW Device UI ™ Application Stacks Middleware, Agents Android ™ Linux ® Others ® * Board tracing and debug is usually intrusive, affecting speed, performance measurements and behavior Consistent hardware and software behavior Well defined system Timing – Instantly stop all system clocks Non-intrusive Visibility & Profiling* – No affect on behavior – Minor affect on performance

January 29, Debugger Connection to virtual target “Host” Machine IDE & Builder Compiler Debugger Profiler CodeBench Virtual Edition Peripherals TimerGPIO LCD Video DDR3PHY SDRAMBridge DMA USBETHERNET PCI EXPRESS GPU PHY MPEG CPU UART GDB Connection to CPU (Baremetal debug) The debugger can connect to the virtual target in Linux or Baremetal mode without any Probe. Debugging link is set instantly. Ethernet Connection to OS (Linux Mode)

January 29, Network & I/O Connectivity “Host” Machine IDE & Builder Compiler Debugger Profiler SW Developer Tools Peripherals TimerGPIO LCD Video DDR3PhyPHY SDRAMBridge DMA USBETHERNET PCI EXPRESS GPU PHY MPEG CPU Embedded SW Device UI ™ Application Stacks Middleware, Agents Android ™ Linux ® Others ® UART Standby Reset CDSP CDSP I2C Standby/ Mute Reset FM Front End I2C Ampli I2C I2C DSP I2C TU2 I2C Ampli MNAND 16GB DAB DECODER ENx Pins IPOD chip SPI AM/FM Front End CAN TJA1054 Tx/Rx I2C Standby Reset CDSP Control UART FlashDRAM I2C Ampli EEPROM I2C Eeprom I2C DSP I2C TU2 Vehicle processor VµC V850 Radio Processor DRA404HS I2S SPI Analog Audio data I2S DAB Front End TMC Front End To USB HUB DATA Control AUX BT I2S Virtual Platform GDB Driver USB Connect Ethernet Connect File I/O (gps, gyro) Virtual Drivers File I/O (gps, gyro) Virtual Drivers The Virtual Platform can connect through the host physical I/O’s Eth, USB, LCD, keyboard IP Address Ping from terminal… Terminal

January 29, Instantly Configure Hardware Peripherals TimerGPIO LCD Video DDR3PHY SDRAM Bridge DMA USBETHERNET PCI EXPRESS GPU PHY MPEG CPU UART Configure Cache, MMU, # of cores Configure Memory & Controller “Disable” selected IP’s Manipulate clocks You can easily manipulate and configure the hardware Test platform derivatives and run trade off analysis You can easily manipulate and configure the hardware Test platform derivatives and run trade off analysis Peripherals TimerGPIO LCD Video DDR3PHY SDRAMBridge DMA USBETHERNET PCI EXPRESS GPU PHY MPEG CPU UART Peripherals TimerGPIO LCD Video DDR3PHY SDRAMBridge DMA USBETHERNET PCI EXPRESS GPU PHY MPEG CPU UART Peripherals TimerGPIO LCD Video DDR3PHY SDRAMBridge DMA USBETHERNET PCI EXPRESS GPU PHY MPEG CPU UART Run regressions on multiple alternatives Manipulate Connectivity Configure Memory & Controller “Disable” selected IP’s Manipulate clocks Manipulate Connectivity

January 29, Tightly Coupled Debug View registers and variables in the hardware model Break software execution on events in the hardware model Virtual Prototype Manager

January 29, Deep non-intrusive visibility to hardware Peripherals TimerGPIO LCD Video DDR3PHY SDRAM Bridge DMA USBETHERNET PCI EXPRESS GPU PHY MPEG CPU UART Trace Cache & MMU sequences Trace All internal and I/O registers Trace All data transfers Trace All Memories When execution on a Virtual Target the user get deep and constant access at all times to all hardware internals. All tracing are collected on the host. This visibility is critical to unveil deep embedded bugs during OS bringup, running graphic application, etc.

January 29, Non-intrusive SW trace & profiling With a Virtual target, Software is executed on host using JIT (Just In Time) translation. This mechanism provide backdoor access to software without affecting target execution Can inject test code, e.g. prints, callbacks Controlled via scripts in real time No recompilation is required Software image untouched All tracing collected on Host Unlimited capacities No affect on target performance Can be used to various validation flows Code Coverage Software Profiling Fault Injection Host Machine Virtual Platform Target ISS Software Source Software Image Host Code Execution (JIT) Executed on Host A B C D A B C D A B C D X Print Log Assert Target Functionality & Timing not affected Code Injection TCL Scripts X Hardware state dependencies Trace Poin t

January 29, Fault Injection during software debug Injecting Software Faults Register security & safety failures Register values Protocol errors Tracking failure statistics over multiple lifecycles Injecting Hardware Faults Interrupts Memory Failures Power Failures File system and disk failures External device failures Virtual Platforms can be manipulated to inject artificial faults, internal or from external devices at runtime Peripherals TimerGPIO LCD Video DDR3PhyPHY SDRAMBridge DMA USBETHERNET PCI EXPRESS GPU PHY MPEG CPU UART Standby Reset CDSP CDSP I2C Standby/ Mute Reset FM Front End I2C Ampli I2C I2C DSPI2C DSP I2C DSPI2C DSP I2C TU2 I2C Ampli MNAND16GBMNAND16GB DAB DECODER ENx Pins IPOD chip SPI AM/FM Front End CAN TJA1054 Tx/Rx I2C Standby Reset CDSP Control UART FlashDRAM I2C Ampli EEPROM I2C Eeprom I2C DSPI2C DSP I2C TU2 Vehicle processor VµC V850 Radio Processor DRA404HS I2S SPI Analog Audio data I2S DAB Front End TMC Front End To USB HUB DATA Control AUX BT I2S

January 29, Profile Hardware / Software in synch CPU States (active / sleep / Idle..) SW Functions (Start - End) Gant-Chart Power Consumption Trace hardware and software simultaneously Hardware cache, power Software functions Processor access latency Explore DVFS and user experience senarious

January 29, SW – Cache – Power Interaction Track SW calls Correlate SW to – Stack trace – Cache activity – Power consumption Identify functions for optimization – Cache hit percentage decreases – Power consumption increases Cache Hit Rate Power Consumption

January 29, Software Profiling & Analysis Function Call Hierarchy CPU Utilization E.g. Graphic Analysis – OpenGL and Qt Tracing – Smart Agents pinpoint miss behavior – Visibility into graphic execution layers OGLES Rendering CPU Scheduling Peripherals TimerGPIO LCD Video DDR3PhyPHY SDRAMBridge DMA USBETHERNET PCI EXPRESS GPU PHY MPEG CPU Embedded SW Device UI ™ Application Stacks Middleware, Agents Android ™ Linux ® Others ® UART Standby Reset CDSP CDSP I2C Standby/ Mute Reset FM Front End I2C Ampli I2C I2C DSP I2C TU2 I2C Ampli MNAND 16GB DAB DECODER ENx Pins IPOD chip SPI AM/FM Front End CAN TJA1054 Tx/Rx I2C Standby Reset CDSP Control UART FlashDRAM I2C Ampli EEPROM I2C Eeprom I2C DSP I2C TU2 Vehicle processor VµC V850 Radio Processor DRA404HS I2S SPI Analog Audio data I2S DAB Front End TMC Front End To USB HUB DATA Control AUX BT I2S GDB

January 29, Example - Integrate with Automotive Network Simulation Easy configuration & manipulation (derivative) Network & Absent Node Simulation Timing, Performance & Utilization in Network context SW Profiling in Network Context Safety in Network context RTE SWC AUTOSAR SWC AUTOSAR BSW OS Virtual ISS/ECU Bus RTE BSW OS Virtual ISS/ECU Matlab Simulink HIL AUTOSAR

January 29, Summary: Virtual Prototype Key Values While executing software on a Virtual Target is similar to executing on a physical board, it offers several key capabilities that are unique – Availability before silicon or hardware are committed – Instantly configure and manipulate hardware alternatives, derivatives and subsets – Deep non-intrusive visibility to HW and SW – “Unlimited” tracing capacities with no affect on behavior – Tightly control hardware software execution – Fast, deterministic execution of native embedded software – May have various abstraction levels and timing fidelities – Host resources provide real world I/O – Its Virtual! You can share it through s

January 29, Thank You!

January 29, Non-intrusive visibility & debug “Host” Machine IDE & Builder Compiler Debugger Profiler SW Developer Tools Peripherals TimerGPIO LCD Video DDR3PhyPHY SDRAMBridge DMA USBETHERNET PCI EXPRESS GPU PHY MPEG CPU Embedded SW Device UI ™ Application Stacks Middleware, Agents Android ™ Linux ® Others ® UART Standby Reset CDSP CDSP I2C Standby/ Mute Reset FM Front End I2C Ampli I2C I2C DSP I2C TU2 I2C Ampli MNAND 16GB DAB DECODER ENx Pins IPOD chip SPI AM/FM Front End CAN TJA1054 Tx/Rx I2C Standby Reset CDSP Control UART FlashDRAM I2C Ampli EEPROM I2C Eeprom I2C DSP I2C TU2 Vehicle processor VµC V850 Radio Processor DRA404HS I2S SPI Analog Audio data I2S DAB Front End TMC Front End To USB HUB DATA Control AUX BT I2S Virtual Platform GDB Backdoor access to software execution Trace points at any Software location Inject piece of code at Trace point during execution Control and manipulate software execution Hardware Tracing Registers, CPU State & IRQ visibility, MMU & Caching sequences Pipeline & Buffering Throughput & Latencies SW Code Coverage Hardware Trace Memory Allocation