1 FTK Rear Transition Card Mircea Bogdan The University of Chicago March 12, 2013 Board Review.

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Presentation transcript:

1 FTK Rear Transition Card Mircea Bogdan The University of Chicago March 12, 2013 Board Review

Mircea Bogdan, March 12, FTK Rear Transition Card 9U VME Rear Transition Card I/Os: -2 x QSFP (8 x 6Gbps) -1 x SFP (1 x 2Gbps) -P3 Connector: - 12 x 2Gbps -16 x 2Gbps -P2 Connector: - VME: Data, Addr, Aux - HOLDs to Input FPGAs (4+8) - HOLDs from Processor FPGAs (4x4) - FREEZE In, Out Block Diagram

Mircea Bogdan, March 12, FTK Rear Transition Card Power Requirement Estimate (4 Processor FPGAs, 4 RLDRAMs, 2 Input FPGAs): -Power consumption per Processor FPGA ~ 12W -Power consumption per Input FPGA ~ 3 W -Total Power Consumption Estimate ~ W per card Power Supply Issues Supply Options per Slot (Front Modules DO NOT draw any +5V current): 1.P2/P0: +5V rated for 18.5/11.5A (20C/70C), total: 57.5W to 92.5W. 2.P0: Vw, Vx, Vy, Vz: at +5V rated each for 4A/3A (20C/70C), total: 60W to 80W. 3.Option 1 and 2 combined: total: 117.5W to 172.5W. 4.P0: Vw, Vx, Vy, Vz: at +15V rated each for 4A/3A (20C/70C), i.e. 180W to 240W total.

Mircea Bogdan, March 12, FTK Rear Transition Card Routing: - HS lines:- routed between ground planes, 6mil width, 4 mil gap, 100Ohm, reduced number of vias, ground return vias, first plane cut-out under AC caps, matched length in pair. - LVTTL lines: separate layers, 4 mil width, 50Ohm. - 2 Oz Copper on 1.1V POWER_1.

Mircea Bogdan, March 12, FTK Rear Transition Card Attenuation = 2.3 f (tan d) sqrt( e r ) erer tan d Attenuation at 2.5Gbps [dB/inch] Signal Loss 16” - 2.5Gbps [dB] Attenuation at 7Gbps [dB/inch] Signal Loss 4” - 7Gbps [dB] Cost 150 pc FR $21K N EP $34K N EPSI $38K Rogers 4350B Material Selection Max trace length: 16” for 2Gbps, 4” for 6Gbps Note: The first AUX Test Card, made with FR4, has max trace length 12” for 2Gbps: Signal Loss = 1.6dB.