Items for Discussion Chip reliability & testing Testing: who/where/what ??? GBTx radiation testing GBTx SEU testing Packaging – Low X0 options, lead free.

Slides:



Advertisements
Similar presentations
Agenda Semiconductor materials and their properties PN-junction diodes
Advertisements

Semiconductors Chapters
6.1 Transistor Operation 6.2 The Junction FET
P-N JUNCTION.
CHAPTER 4 CONDUCTION IN SEMICONDUCTORS
ECE G201: Introductory Material Goal: to give you a quick, intuitive concept of how semiconductors, diodes, BJTs and MOSFETs work –as a review of electronics.
VLSI Design Lecture 3a: Nonideal Transistors. Outline Transistor I-V Review Nonideal Transistor Behavior Velocity Saturation Channel Length Modulation.
© Electronics ECE 1312 Recall-Lecture 2 Introduction to Electronics Atomic structure of Group IV materials particularly on Silicon Intrinsic carrier concentration,
1 Fundamentals of Microelectronics  CH1 Why Microelectronics?  CH2 Basic Physics of Semiconductors  CH3 Diode Circuits  CH4 Physics of Bipolar Transistors.
Introduction to CMOS VLSI Design Lecture 15: Nonideal Transistors David Harris Harvey Mudd College Spring 2004.
Figure 2.1 The p-n junction diode showing metal anode and cathode contacts connected to semiconductor p-type and n-type regions respectively. There are.
Semiconductor Physics - 1Copyright © by John Wiley & Sons 2003 Review of Basic Semiconductor Physics.
Introduction to CMOS VLSI Design Lecture 19: Nonideal Transistors
Introduction to CMOS VLSI Design MOS Behavior in DSM.
School of Microelectronic Engineering EMT362: Microelectronic Fabrication Thin Gate Oxide – Growth & Reliability Ramzan Mat Ayub School of Microelectronic.
EE/MAtE1671 Front-End-Of-Line Variability Considerations EE/MatE 167 David Wahlgren Parent.
EE/MAtE1671 Process Variability EE/MatE 167 David Wahlgren Parent.
S. Reda EN160 SP’07 Design and Implementation of VLSI Systems (EN0160) Lecture 20: Circuit Design Pitfalls Prof. Sherief Reda Division of Engineering,
VLSI Design Lecture 3a: Nonideal Transistors
Lecture 10: PN Junction & MOS Capacitors
Ideal Diode Model.
MatE/EE 1671 EE/MatE 167 Diode Review. MatE/EE 1672 Topics to be covered Energy Band Diagrams V built-in Ideal diode equation –Ideality Factor –RS Breakdown.
Characterisation and Reliability Testing of THz Schottky Diodes Chris Price University of Birmingham, UK
Introduction to CMOS VLSI Design Nonideal Transistors.
University of Michigan Electrical Engineering and Computer Science 1 Online Timing Analysis for Wearout Detection Jason Blome, Shuguang Feng, Shantanu.
The Devices: Diode Once Again. Si Atomic Structure First Energy Level: 2 Second Energy Level: 8 Third Energy Level: 4 Electron Configuration:
5/24/2016 Based on text by S. Mourad "Priciples of Electronic Systems" Digital Testing: Defects, Failures and Faults.
-1- UC San Diego / VLSI CAD Laboratory Methodology for Electromigration Signoff in the Presence of Adaptive Voltage Scaling Wei-Ting Jonas Chan, Andrew.
EE415 VLSI Design The Devices: Diode [Adapted from Rabaey’s Digital Integrated Circuits, ©2002, J. Rabaey et al.]
Uncertainties in Thermal Barrier Coating Life Prediction by Karl A. Mentz A Thesis Submitted to the Graduate Faculty of Rensselaer Polytechnic Institute.
Joseph B. Bernstein Ofir Delly,
Example 5-3 Find an expression for the electron current in the n-type material of a forward-biased p-n junction.
Chapter 3 Solid-State Diodes and Diode Circuits
Total Dose Effects on Devices and Circuits - Principles and Limits of Ground Evaluation-
Avalanche Transit Time Devices
Topics SCMOS scalable design rules. Reliability. Stick diagrams. 1.
ENE 311 Lecture 9.
Process Variation Mohammad Sharifkhani. Reading Textbook, Chapter 6 A paper in the reference.
Short Channel Effects in MOSFET
Empirical Observations of VBR
Semiconductor Devices Lecture 5, pn-Junction Diode
HO #3: ELEN Review MOS TransistorsPage 1S. Saha Long Channel MOS Transistors The theory developed for MOS capacitor (HO #2) can be directly extended.
M.Nuzaihan DMT 243 – Chapter 5 Fundamental Design For Reliability What is Design for Reliability, Microsystems Failure & Failure Mechanisms, Fundamental.
Schottky Barrier Diode One semiconductor region of the pn junction diode can be replaced by a non-ohmic rectifying metal contact.A Schottky.
University of Rostock Institute of Applied Microelectronics and Computer Engineering Monitoring and Control of Temperature in Networks-on- Chip Tim Wegner,
Data Retention in MLC NAND FLASH Memory: Characterization, Optimization, and Recovery. 서동화
Thin Oxides The new frontier. Volume 43, No Special Issue on Ultrathin Oxides.
June 13, MURI Annual Review X. J. Zhou, et al 1 Effects of Switched-Bias Annealing on Charge Trapping in HfO 2 high-  Gate Dielectrics X. J.
Taniya Siddiqua, Paul Lee University of Virginia, Charlottesville.
Best 3 Applications Involving in Zener Diode Working Functionality.
CSE251 CSE251 Lecture 2 and 5. Carrier Transport 2 The net flow of electrons and holes generate currents. The flow of ”holes” within a solid–state material.
Smruti R. Sarangi IIT Delhi
Opto Mini-Workshop, CERN 21/3/14
Lecture 12 OUTLINE pn Junction Diodes (cont’d) Junction breakdown
Recall-Lecture 3 Atomic structure of Group IV materials particularly on Silicon Intrinsic carrier concentration, ni.
EMT362: Microelectronic Fabrication Thin Gate Oxide – Growth &
Recall-Lecture 3 Atomic structure of Group IV materials particularly on Silicon Intrinsic carrier concentration, ni.
3D IC Reliability Xinxin Yu, Hao Wu.
VLSI design Short channel Effects in Deep Submicron CMOS
Kai Nia, Enxia Zhanga, Ronald D. Schrimpfa,
Recall-Lecture 3 Atomic structure of Group IV materials particularly on Silicon Intrinsic carrier concentration, ni.
Introduction to CMOS VLSI Design Chapter 3: CMOS Processing Technology
Impact of Negative Bias Temperature Instability on FPGAs
Deviations from the Ideal I-V Behavior
Lecture 11 OUTLINE pn Junction Diodes (cont’d) Narrow-base diode
Lecture 12 OUTLINE pn Junction Diodes (cont’d) Junction breakdown
Semiconductor Physics
HotAging — Impact of Power Dissipation on Hardware Degradation
PN-JUNCTION.
Chapter 3 Solid-State Diodes and Diode Circuits
Presentation transcript:

Items for Discussion Chip reliability & testing Testing: who/where/what ??? GBTx radiation testing GBTx SEU testing Packaging – Low X0 options, lead free solder? lpGBTx plans and timescales 1

Chip Reliability What is there to worry about? Failure Mechanisms Statistical analysis PoF Collaboration on reliability testing 2

Why worry? Traditionally failures in HEP not dominated by ASIC reliability – Connectors, solder, wire bonds, cracks in tracks and vias, capacitors, power supplies – Non-ideal scaling in DSM processes Aggressive designs target optimal performance Voltage decreases insufficient to compensate density increase  higher T  lower reliability. 3

FA Webinar- Cheryl Tulkoff 4

Physics of Failure (PoF) Assumption of single dominant damage mechanism can lead to wrong extrapolation of lifetimes from accelerated tests. PoF aims to understand different failure mechanisms – Fit model parameters to data for each damage mechanism – Combine results to predict reliability at operating conditions – Health warning: competing models for some damage mechanisms can give very different extrapolations to operating conditions. 5

Time Dependent Dielectric Breakdown (TDDB) In DSM processes E fields over gate oxides ~ 5 MV/cm cf breakdown fields of > ~ 10 MV/cm. – Gradual degradation  later failures Acceleration model – MTTF=A×10 -βE exp(-Ea/kT) – Example fits look ok but activation energy not constant?  next slide –  can’t fit to single failure mechanism! Holes injected into oxide  Stress Induced leakage currents by tunnelling  breakdown 6

TDDB Fits Fits to Voltage (E field) and T look ok but estimated value of Ea depends on E ? MTTF vs E MTTF vs 1/T Fitted E a not constant! 7

Hot Carrier Injection (HCI) Non-ideal scaling  larger E fields  “hot” carriers can overcome barrier between Si and gate oxide – Trapped charges lead to changes in Vth and gm – Eventually lead to failure – t = c (I sub ) -m – T dependence because at low T electron mfp longer  acquire more energy in E field  impact ionization. 8

HCI Example fits to threshold shifts. Typical fit values – m ~ 3 Also need to consider T variation. Shift Min Vcc 9

Electro-migration (EM) High current densities, force exerted by electrons large enough to cause diffusion of metal ions in the direction of the e flow. – Creates voids  increases R  thermal runaway  open circuit – Excess build up of ions at the anode can give short circuit Very sensitive to material, doping, grain boundaries etc… EM is thermally activated, T gradients  flux divergences. Best model – Typical values for Al: Ea=0.6 eV and n ~ 2. 10

Other Mechanisms NBTI (Negative Bias Temperature Instability) – Degradation (Vth/Gm shift) occurring due to negative biased BT (bias temperature) stress in PMOS FETs Stress migration – CTE mismatch can cause stress even with no current. Assembly & packaging 11

Combining Failure Rates Common method is just to assume exponential distributions – Total failure rate: – But we know that failure distributions aren’t exponential ! Failure distributions better modelled by Weibull or log- normal distributions. Finally we don’t actually want MTTF we need MTT01 (1% failure) or MTT110 (10% failure). – Need to combine distributions correctly from different failure mechanisms. – Determine MTT0X numerically 12

Compare Distributions Compare exponential, Weibull and log-normal Note Weibull and log normal totally different from exponential for small x – This is just the region we are interested in! 13

Determining Model Parameters Brute force: Run ALT for matrix of different T and V and fit data to get model parameters. – Too many tests  too slow/expensive. Smarter approach – High T/High V  TDDB Vary T  Ea, vary V  exponent c – Low T/High V  HCI Vary T  Ea2, vary V   2 – High T/low V  EM dominates Vary T  Ea3 14

15 Next slides from Steve McMahon (RAL)

16

17

Next Steps Fix some parameters: – Sample sizes – How many different test conditions can we run – Do tests have to continue until we reach 50% failures or can we perform fits with fewer failures? Toy MC study to optimise power of set of points in V &T space. – Generate pseudo-data from the models Don’t need to assume unrealistic exponential distributions. Failure probability given by – Try to fit the pseudo-data to determine the model parameters. 18

References Bernstein, Physics of Failure Based Handbook of Microelectronic Systems, RIAC. Srinivasaan et al, The impact of Technology Scaling on Lifetime Reliability, DSN-04. Semiconductor Reliability Handbook, 19