Copyright © 2009 Intel Corporation. All rights reserved. Intelligent Performance April 15th, 2009 Basarim 09 National HPC Conference Ankara, Turkey Stephan Gillich Director HPC EMEA Enterprise Marketing Intel GmbH

Copyright © 2009 Intel Corporation. All rights reserved. Legal Disclaimer  INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL® PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. INTEL PRODUCTS ARE NOT INTENDED FOR USE IN MEDICAL, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS.  Intel may make changes to specifications and product descriptions at any time, without notice.  All products, dates, and figures specified are preliminary based on current expectations, and are subject to change without notice.  Intel, processors, chipsets, and desktop boards may contain design defects or errors known as errata, which may cause the product to deviate from published specifications. Current characterized errata are available on request.  This document may contain information on products in the design phase of development. The information here is subject to change without notice. Do not finalize a design with this information.  Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.  Intel Corporation may have patents or pending patent applications, trademarks, copyrights, or other intellectual property rights that relate to the presented subject matter. The furnishing of documents and other materials and information does not provide any license, express or implied, by estoppel or otherwise, to any such patents, trademarks, copyrights, or other intellectual property rights.  Wireless connectivity and some features may require you to purchase additional software, services or external hardware.  Nehalem, Penryn, Westmere, Sandy Bridge and other code names featured are used internally within Intel to identify products that are in development and not yet publicly announced for release. Customers, licensees and other third parties are not authorized by Intel to use code names in advertising, promotion or marketing of any product or services and any such use of Intel's internal code names is at the sole risk of the user  Performance tests and ratings are measured using specific computer systems and/or components and reflect the approximate performance of Intel products as measured by those tests. Any difference in system hardware or software design or configuration may affect actual performance.  Intel, Intel Inside, Pentium, Xeon, Core and the Intel logo are trademarks of Intel Corporation in the United States and other countries.  *Other names and brands may be claimed as the property of others.  Copyright © 2008 Intel Corporation.

Copyright © 2009 Intel Corporation. All rights reserved. Risk Factors Today’s presentations contain forward-looking statements. All statements made that are not historical facts are subject to a number of risks and uncertainties, and actual results may differ materially. Please refer to our most recent Earnings Release and our most recent Form 10-Q or 10-K filing available on our website for more information on the risk factors that could cause actual results to differ. Performance tests and ratings are measured using specific computer systems and/or components and reflect the approximate performance of Intel products as measured by those tests. Any difference in system hardware or software design or configuration may affect actual performance. Buyers should consult other sources of information to evaluate the performance of systems or components they are considering purchasing. For more information on performance tests and on the performance of Intel products, visit Intel Performance Benchmark Limitations ( Rev. 7/19/06

Copyright © 2009 Intel Corporation. All rights reserved. Agenda   HPC demand for performance and more   Meeting the HPC challenges: Everywhere – –Today – –Tomorrow – –With HW, SW

Copyright © 2009 Intel Corporation. All rights reserved. A look at CERN’s Computing Growth Source: CERN, Sverre Jarp Tape Space (PetaByte) Disk Space (PetaByte) Computing 21, SI2K per core Lots of computing (45% CAGR), lots of data; no upper boundary!

Copyright © 2009 Intel Corporation. All rights reserved. Insatiable Demand for Performance, Density, and Efficiency Intel Power Reduction Over Time*Demand For Performance (as per Top500) E-07 1.E-06 1.E-05 1.E-04 1.E-03 1.E-02 1.E-01 1.E+00 1 PFlops 1 TFlops 1 GFlops 100 MFlops 100 PFlops 1 EFlops ZFlops 2029 Source: Top500.org Massive Reduction In Energy per Transistor* Over 30+ Years

Copyright © 2009 Intel Corporation. All rights reserved. Intelligent Performance Versatility Ease of use Meeting Today’s HPC Challenges Genomics Research Medical Imaging Weather Prediction Oil ExplorationDesign Simulation Financial Analysis Democratization of HPC

Copyright © 2009 Intel Corporation. All rights reserved. Intel Architecture Core New Materials and Designs Single Core Enhancements Platform Enhancements Scaling technology Multi to Many-Core Intelligent Performance

Copyright © 2009 Intel Corporation. All rights reserved. Intel Architecture Core Tri-Gate, Nanotubes  MMX  SSE  AVX  PCIe, IMC, QPI, SOC  Scaling technology Dual  Quad  … Intelligent Performance

Copyright © 2009 Intel Corporation. All rights reserved. Delivering Leadership Multi-Core Performance Silicon and Architecture Advances Unleash Performance 2 YEARS 45nm 32nm Shrink/Derivative Westmere New Microarchitecture Sandy Bridge 65nm 2 YEARS Shrink/Derivative PentiumD· Intel® Xeon® New Microarchitecture Intel ® Core™ Microarchitecture Shrink/Derivative Intel® Xeon® 54XX Series New Microarchitecture Intel® Xeon 5500 Series (Nehalem) “Tick Tock” (Shrink) (Innovate) “Tick Tock” (Shrink) (Innovate) Intelligent Performance

Copyright © 2009 Intel Corporation. All rights reserved. Intel® Xeon® 5500 Platform Intel® 5520 Chipset NEW! Intel® Data Center ManagerNEW! NEW! Intel® Node Manager Technology PCI Express* 2.0 ICH 9/10 Intel® X25-E SSDs Intel® GbE Controller NEW! Platform improvements - Ready for Future 32nm Products New Memory Subsystem Intel® Quick-Path Interconnect Intel® Intelligent Power Technology New I/O Subsystem Intelligent Performance

Copyright © 2009 Intel Corporation. All rights reserved. Intel® Xeon® 5500: Intelligence Built-In Adapts To Your Application and User Environment Power Constrained Performance Critical Native Virtualized Highly Parallel Frequency Sensitive Performance On-Demand Intel® Nehalem Microarchitecture Intel® Turbo Boost Technology Intel® Hyper-Threading Technology Intel® Intelligent Power Technology Integrated Power Gates Automated Low-Power States Intel® Node Manager Technology Intelligent Performance

Copyright © 2009 Intel Corporation. All rights reserved. Intel Turbo Boost Technology Overview   CPUs typically operate at a fixed max frequency regardless of the workload   For the most demanding workloads, the CPU operates closer to its power limitations CPU Speed Max Power Rated Speed Power Operating Power Core 0Core 1 Core 3Core 2 Intel ® Turbo Boost Technology – Delivers More Intelligent Performance Automatically Intelligent Performance

Copyright © 2009 Intel Corporation. All rights reserved. Intel Turbo Boost Technology Overview   However, most applications allow the CPU to operate below maximum power   Power headroom may also be available if cores are in idle mode Core 0Core 1 Core 3Core 2 CPU Speed Max Power Rated Speed Power Operating Power POWER HEADROOM Intel ® Turbo Boost Technology – Delivers More Intelligent Performance Automatically Intelligent Performance

Copyright © 2009 Intel Corporation. All rights reserved. Intel Turbo Boost Technology Overview   Turbo Boost speeds up the CPU to utilize any available power headroom Core 0Core 1 Core 3Core 2 CPU Speed Max Power Rated Speed Power Operating Power TURBO BOOST Intel ® Turbo Boost Technology – Delivers More Intelligent Performance Automatically Intelligent Performance

Copyright © 2009 Intel Corporation. All rights reserved. Intel Turbo Boost Technology   Turbo Boost speeds up the CPU to utilize any available power headroom   With fewer cores active and more headroom, the CPU can reach even higher frequencies Core 0Core 1 CPU Speed Max Power Rated Speed Power Operating Power TURBO BOOST Intel ® Turbo Boost Technology – Delivers More Intelligent Performance Automatically Intelligent Performance

Copyright © 2009 Intel Corporation. All rights reserved. Performance Summary Intel ® Xeon ® Processor 5500 Series (Nehalem-EP) Compelling Performance Gains Across the Board SPECfp_rate downbin dataSPECint_rate downbin data Technical Compute Servers Finite Element Analysis Comp Fluid Dynamics Energy Floating Point Memory Bandwidth Intel Xeon X5570 (2.93 GHz) vs. Intel Xeon X5482 (3.20GHz) Weather Source: Published/submitted/approved results March 30, See backup for additional details Intelligent Performance

Copyright © 2009 Intel Corporation. All rights reserved. Early reality..... “Application performance is critical to the work we carry out at the Forschungszentrum Jülich.... Clearly, the greater application performance we can achieve the greater understanding we receive.... Crucial for application performance in HPC is memory bandwidth and IO performance. The Intel® Xeon® processor 5500 series definitely is a leap ahead in both respects. Therefore JSC decided to base the next- generation general-purpose supercomputer JuRoPA on this processor.” Dr. Norbert Eicker, Forschungszentrum Jülich, Intelligent Performance

Copyright © 2009 Intel Corporation. All rights reserved. Intel® Xeon 5500 Putting More Brainpower into the HPC Datacenter Source: Intel estimates and measurements as of Nov Performance comparison using SPECfp_rate _base2006. Use this slide in conjunction with backup slide. Performance tests and ratings are measured using specific computer systems and/or components and reflect the approximate performance of Intel products as measured by those tests. Any difference in system hardware or software design or configuration may affect actual performance. Buyers should consult other sources of information to evaluate the performance of systems or components they are considering purchasing. For more information on performance tests and on the performance of Intel products, visit Intel Performance Benchmark Limitations Results have been estimated based on internal Intel analysis and are provided for informational purposes only. Any difference in system hardware or software design or configuration may affect actual performance. 4 X Performance Less Power, Same Space New Intel Xeon® 5500 Series Dual-core Intel Xeon® 5160 Processor (Woodcrest) 2009: 1,000 servers2006: 1,000 servers Intelligent Performance

Copyright © 2009 Intel Corporation. All rights reserved. Intel Technology is Changing HPC TCO, Performance, Reliability Extreme Performance Power Efficient Reduce System Cost Increased Reliability 10GbE Solid State Disk €Intel IT evaluation results. Optimize Performance for I/O Intensive Apps and Boot Drive Replacement Bridging the Gap Between 1GbE and Infiniband®

Copyright © 2009 Intel Corporation. All rights reserved. The Challenge Parallel Programming ? Irregular Patterns, Data Structures and Serial Algorithms Increasing Cores Vector Instructions Cache and Interconnect Latency Scale to Multi-Core Today → Hard Scale to Many-Core Tomorrow → Harder Versatility

Copyright © 2009 Intel Corporation. All rights reserved. One Development Environment Simplify Your Development PerformanceOptimize/Tune Development Introduce Parallelism ConfidenceCorrectness Insight Architectural Analysis  Windows*; Linux*; Mac OS* Versatility

Copyright © 2009 Intel Corporation. All rights reserved. Example: Intel® Trace Analyzer Comparison of function and process profile data Can show user defined blocks of code Show overall MPI process-to- process communication information Event Timeline for each MPI Process Comparison of two timeline traces

Copyright © 2009 Intel Corporation. All rights reserved. ICR – Intel® Cluster Ready Simplify Management with Intel® Cluster Checker Simplify Deployment with registered applications Simplify Manufacturing with defined recipes and Intel® Cluster Checker to validate Simplify Purchasing with certified cluster configurations Simplifying Your Cluster What is ICR? A specification to help OEM’s & Integrators & iSVs and end users to manufacture, deploy and use HPC clusters Ease of use

Copyright © 2009 Intel Corporation. All rights reserved. What These Changes Mean Manufacturing Then (90’s)Now (2009) 1 Modal & Transient Analysis/Day 100’s Modal & Transient Analyses/Day enabling multivariate design optimization (previously not possible) <1M cell Computational Fluids Model 1+B cell Computational Fluids Model where refined resolution enables quantification of certain phenomena that was previously not possible Multiple days to process digital mock up in low-quality photorealistic imagery Real-time high-quality photorealistic visualization on a dual processor workstation enabling design review usage not previously possible HPC Technology Changing Design Cadence Almost Possible To Optimize On The Fly Intelligent Performance

Copyright © 2009 Intel Corporation. All rights reserved. The Future Looks Bright Breakthrough Technology Year After Year 45nm –Intel® Xeon 5400 –Intel® Xeon 5500 –Nehalem EX Future A leap ahead in technology 22nm Continue to deliver world class processor technology 32nm –Westmere – more cores –Sandy Bridge – higher integration Silicon and Software Tools Unleash Performance Scaling Performance forward

Copyright © 2009 Intel Corporation. All rights reserved. Nehalem-EX The Next Step in Large Scale HPC High Performance HPC –Up to 8 cores per socket –24MB shared last level cache –4 full width QPI –Integrated memory controller –4 memory channels per socket –Up to 16 DIMMs per socket –Registered DDR3 memory Intelligent Performance –Intel® Turbo Boost Technology –Hyper-Threading technology –More and lower power CPU states More Scalability, Cores, and Memory Capacity Schedule: Target Q4’09 Production Availability. 4 Intel® Scalable Memory Interconnects 4 Full-width Intel® QuickPath Interconnects Scaling Performance forward

Copyright © 2009 Intel Corporation. All rights reserved. Westmere

Copyright © 2009 Intel Corporation. All rights reserved. Intel® AVX: A future 256-bit vector extension to SSE that benefits floating point intensive applications Enhanced Data Rearrangement Use the new 256 bit primitives to broadcast, mask loads and do data permutes Wider Vectors Increased from 128 bit to 256 bit Organize, access and pull only necessary data more quickly and efficiently Up to 2x peak FLOP output KEY FEATURES BENEFITS Fewer register copies More opportunities for parallel loads and compute operations, smaller code size Three Operand, Non Destructive Syntax Designed for efficiency and future extensibility

Copyright © 2009 Intel Corporation. All rights reserved. Scaling Performance Forward   Enabling you to: – – Accelerate computational performance – – Utilize an architecture that is best for your Application – – Employ a uniform development tool across all architectures 30 Scale Performance Forward To Multi & Many Core Solutions 30 …… Research No indication of Actual product or dev

Copyright © 2009 Intel Corporation. All rights reserved. Research: Ct: A Throughput Programming Language Thread Thread Thread Thread Ct JIT Compiler: Auto-vectorization, SSE, AVX, Core 1 SIMD Unit Core 2 SIMD Unit Core 3 SIMD Unit Core 4 SIMD Unit Programmer Thinks Serially; Ct Exploits Parallelism Ct Parallel Runtime: Auto-Scale to Increasing Cores User Writes Serial-Like Core Independent C++ Code TVEC a(src1), b(src2); TVEC c = a + b; c.copyOt(dest); TVEC a(src1), b(src2); TVEC c = a + b; c.copyOt(dest); Primary Data Abstraction is the Nested Vector Supports Dense, Sparse, and Irregular Data

Copyright © 2009 Intel Corporation. All rights reserved.  Larrabee is Intel’s first many core processor under development –Targets throughput computing –First implementation targets enthusiast graphics  IA programmability  Programmable graphics pipline  Efficient inter-block communication  C++ Prototype Libray released in March 09 Throughput Computing: A Many Core Processor Architecture. LARRABEE VECTOR IA CORE INTERPROCESSOR NETWORK FIXED FUNCTION LOGIC MEMORY and I/O INTERFACES VECTOR IA CORE COHERENT CACHE … … … … COHERENT CACHE COHERENT CACHE COHERENT CACHE COHERENT CACHE COHERENT CACHE COHERENT CACHE COHERENT CACHE 32

Copyright © 2009 Intel Corporation. All rights reserved. Terascale Experimental Hardware 256 KB SRAM per core 4X C4 bump density 3200 thru-silicon vias Thru-Silicon Via 22 mm mm CORE ROUTER 80 Cores 1 TFLOP at 62 Watts 256 GB/s bisection Optical Fiber Multiplexer Modulators Hybrid lasers 40 Gbps Modulator Tera-Bits: Si Photonics Research Tera-Bytes: 3D Stacked Memory Tera-Flops: Polaris Prototype Package Memory Polaris with Cu bump Polaris Time To Solution =+ Memory Capacity * Bandwidth Time To Compute + Time For I/O + Time For Interconnect Research

Copyright © 2009 Intel Corporation. All rights reserved. Research in Europe Intel Strengthens Commitment to European Research Jan With more than 800 R&D professionals in Europe, Intel has also formed partnerships with leading European research institutes, including the Interuniversity Microelectronics Centre (IMEC) in Belgium, France's CEA Leti Laboratory and others including the Fraunhofer institutes in Germany. Together with the National University of Ireland, Intel leads one of the broadest open innovation initiatives in the IT industry through the Innovation Value Institute. Since 2003 Intel has also been collaborating with CERN on OpenLab I. Participation has recently been extended to include OpenLab III..... Own labs, e.g. In Braunschweig, Cologne, Ulm.... Many collaborations with Research Centers e.g. with those in PRACE EMEA HPC Roundtable Increased effort in Turkey EGEE, Intel event,...

Copyright © 2009 Intel Corporation. All rights reserved. Intel’s Grid Activities Developed prototype Grid components – –Simplify creation of portable Grid applications – –Enables management and use of virtualized Grid resources (CERN cooperation) – –Further development by the Unicore family of projects (FZ Juelich) Engage with Grid experts and users – –European–union funded R&D projects (UniGrids, NextGRID, SimDAT) Interact with ecosystem, standards bodies – –Open Grid Forum (technical influence, board membership) – –Cloud computing as next steps – –July08: Intel, HP, Yahoo create cloud-computing labs A global cloud infrastructure for researchers will help advance the technology, according to the companies

Copyright © 2009 Intel Corporation. All rights reserved. Solving Your HPC Challenges Source: Intel internal measurements, January For notes and disclaimers, see performance and legal information slides at end of this presentation. –Certified cluster configurations to simplify cluster deployment –Easily optimize application performance and eliminate the need to increase software resources –Develop highly portable, parallel software –Huge performance gains to decrease time to discovery –Improved power technology to provide a more efficient data center solution IntelligentPerformance SoftwareVersatility Deployment Ease of Use Scaling Performance Forward

Copyright © 2009 Intel Corporation. All rights reserved. Intel in High Performance Computing A Long Term Commitment to HPC Solutions Dedicated, renowned expertise Large scale clusters for test and optimization Broad SW tools portfolio Terascale Research Leading performance, performance/watt Defined HPC application platform Platform building blocks Manufacturing Process

Copyright © 2009 Intel Corporation. All rights reserved. Intel Intelligent Performance Have a successful conference