Addressing Modes Chapter 11 S. Dandamudi. 2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer, 2003.  S.

Slides:



Advertisements
Similar presentations
Chapter 2 (cont.) An Introduction to the 80x86 Microprocessor Family Objectives: The different addressing modes and instruction types available The usefulness.
Advertisements

There are two types of addressing schemes:
COMP 2003: Assembly Language and Digital Logic
ITCS 3181 Logic and Computer Systems 2015 B. Wilkinson slides3.ppt Modification date: March 16, Addressing Modes The methods used in machine instructions.
ICS312 Set 6 Operands. Basic Operand Types (1) Register Operands. An operand that refers to a register. MOV AX, BX ; moves contents of register BX to.
1/2002JNM1 AL 00 Immediate Addressing Mode Mov AL, 3CH AL 3C.
Irvine, Kip R. Assembly Language For Intel-Based Computers TYPE and SIZE Operators TYPE –returns the size, in bytes of a single element of a data label.
Lect 3: Instruction Set and Addressing Modes. 386 Instruction Set (3.4) –Basic Instruction Set : 8086/8088 instruction set –Extended Instruction Set :
Addressing modes – 1 The way in which an operand is specified is called the Address Mode.
The 8086 Assembly Programming Data Allocation & Addressing Modes
Assembly Language for Intel-Based Computers Chapter 8: Advanced Procedures Kip R. Irvine.
Assembly Language for Intel-Based Computers Chapter 5: Procedures Kip R. Irvine.
1 ICS 51 Introductory Computer Organization Fall 2006 updated: Oct. 2, 2006.
ICS312 Set 3 Pentium Registers. Intel 8086 Family of Microprocessors All of the Intel chips from the 8086 to the latest pentium, have similar architectures.
Microprocessor Systems Design I Instructor: Dr. Michael Geiger Spring 2012 Lecture 2: 80386DX Internal Architecture & Data Organization.
Microprocessor Systems Design I Instructor: Dr. Michael Geiger Spring 2013 Lecture 4: 80386DX memory, addressing.
Microprocessor Systems Design I Instructor: Dr. Michael Geiger Spring 2014 Lecture 4: x86 memory.
Lect 4: Instruction Set and Addressing Modes. 386 Instruction Set (3.4)  Basic Instruction Set : 8086/8088 instruction set  Extended Instruction Set.
High-Level Language Interface Chapter 17 S. Dandamudi.
CEG 320/520: Computer Organization and Assembly Language ProgrammingIntel Assembly 1 Intel IA-32 vs Motorola
Procedures and the Stack Chapter 10 S. Dandamudi.
Procedures and the Stack Chapter 5 S. Dandamudi To be used with S. Dandamudi, “Introduction to Assembly Language Programming,” Second Edition, Springer,
CDP ECE Spring 2000 ECE 291 Spring 2000 Lecture 7: More on Addressing Modes, Structures, and Stack Constantine D. Polychronopoulos Professor, ECE.
Dr. José M. Reyes Álamo 1.  The 80x86 memory addressing modes provide flexible access to memory, allowing you to easily access ◦ Variables ◦ Arrays ◦
The Pentium Processor Chapter 3 S. Dandamudi To be used with S. Dandamudi, “Introduction to Assembly Language Programming,” Second Edition, Springer,
The Pentium Processor Chapter 3 S. Dandamudi.
Low Level Programming Lecturer: Duncan Smeed Overview of IA-32 Part 1.
INSTRUCTION SET AND ASSEMBLY LANGUAGE PROGRAMMING
Faculty of Engineering, Electrical Department,
The x86 Architecture Lecture 15 Fri, Mar 4, 2005.
Procedures and the Stack Chapter 5 S. Dandamudi To be used with S. Dandamudi, “Introduction to Assembly Language Programming,” Second Edition, Springer,
1 ICS 51 Introductory Computer Organization Fall 2009.
Assembly Language for x86 Processors 7th Edition Chapter 13: High-Level Language Interface (c) Pearson Education, All rights reserved. You may modify.
4-Oct Fall 2001: copyright ©T. Pearce, D. Hutchinson, L. Marshall Sept  direct mode: OK for static addresses  indirect register mode:
Computer Programming TCP1224 Chapter 11 Arrays. Objectives Using Arrays Declare and initialize a one-dimensional array Manipulate a one-dimensional array.
Addressing Modes Chapter 6 S. Dandamudi To be used with S. Dandamudi, “Introduction to Assembly Language Programming,” Second Edition, Springer,
Computer Organization
Chapter 11 Instruction Sets: Addressing Modes and Formats Gabriel Baron Sydney Chow.
Overview of Assembly Language Chapter 4 S. Dandamudi.
Data Structures - Part I CS 215 Lecture 7. Motivation  Real programs use abstractions like lists, trees, stacks, and queues.  The data associated with.
Addressing Modes. Addressing Mode The data is referred as operand. The operands may be contained in registers, memory or I/O ports, within the instruction.
Data Structures Covers Chapter 5, pages 144 – 160 and Chapter 6, pages 198 – 203.
Arrays in MIPS Assembly Computer Organization and Assembly Language: Module 6.
Arrays. Outline 1.(Introduction) Arrays An array is a contiguous block of list of data in memory. Each element of the list must be the same type and use.
Assembly Language Data Movement Instructions. MOV Instruction Move source operand to destination mov destination, source The source and destination are.
CSC 221 Computer Organization and Assembly Language Lecture 15: STACK Related Instructions.
Recursion Chapter 16 S. Dandamudi To be used with S. Dandamudi, “Introduction to Assembly Language Programming,” Second Edition, Springer, 2005.
Selection and Iteration Chapter 8 S. Dandamudi To be used with S. Dandamudi, “Introduction to Assembly Language Programming,” Second Edition, Springer,
Arrays In high-level languages, we have several technigues available for constucting data stuctures: −One-dimensional arrays −Multi-dimensional arrays.
Microprocessors CSE- 341 Dr. Jia Uddin Assistant Professor, CSE, BRAC University Dr. Jia Uddin, CSE, BRAC University.
Intel MP Organization. Registers - storage locations found inside the processor for temporary storage of data 1- Data Registers (16-bit) AX, BX, CX, DX.
Addressing Modes Dr. Hadi Hassan.  Two Basic Questions  Where are the operands?  How memory addresses are computed?  Intel IA-32 supports 3 fundamental.
Assembly Language Addressing Modes. Introduction CISC processors usually supports more addressing modes than RISC processors. –RISC processors use the.
Microprocessors CSE- 341 Dr. Jia Uddin Assistant Professor, CSE, BRAC University Dr. Jia Uddin, CSE, BRAC University.
Credits and Disclaimers
Assembly Lab 3.
Microprocessor Systems Design I
Assembly IA-32.
Assembly Lang. – Intel 8086 Addressing modes – 1
Morgan Kaufmann Publishers Computer Organization and Assembly Language
Computer Organization and Assembly Language (COAL)
Microprocessor and Assembly Language
BIC 10503: COMPUTER ARCHITECTURE
(Array and Addressing Modes)
(Array and Addressing Modes)
CNET 315 Microprocessor & Assembly Language
Computer Architecture CST 250
Credits and Disclaimers
Computer Architecture and System Programming Laboratory
(Array and Addressing Modes)
Presentation transcript:

Addressing Modes Chapter 11 S. Dandamudi

2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi Chapter 11: Page 2 Outline Addressing modes Simple addressing modes  Register addressing mode  Immediate addressing mode Memory addressing modes  16-bit and 32-bit addressing »Operand and address size override prefixes  Direct addressing  Indirect addressing  Based addressing  Indexed addressing  Based-indexed addressing Examples  Sorting (insertion sort)  Binary search Arrays  One-dimensional arrays  Multidimensional arrays  Examples »Sum of 1-d array »Sum of a column in a 2-d array Recursion  Examples

2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi Chapter 11: Page 3 Addressing Modes Addressing mode refers to the specification of the location of data required by an operation Pentium supports three fundamental addressing modes:  Register mode  Immediate mode  Memory mode Specification of operands located in memory can be done in a variety of ways  Mainly to support high-level language constructs and data structures

2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi Chapter 11: Page 4 Pentium Addressing Modes (32-bit Addresses)

2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi Chapter 11: Page 5 Memory Addressing Modes (16-bit Addresses)

2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi Chapter 11: Page 6 Simple Addressing Modes Register addressing mode  Operands are located in registers  It is the most efficient addressing mode Immediate addressing mode  Operand is stored as part of the instruction »This mode is used mostly for constants  It imposes several restrictions  Efficient as the data comes with the instructions »Instructions are generally prefetched Both addressing modes are discussed before »See Chapter 9

2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi Chapter 11: Page 7 Memory Addressing Modes Pentium offers several addressing modes to access operands located in memory »Primary reason: To efficiently support high-level language constructs and data structures Available addressing modes depend on the address size used  16-bit modes (shown before) »same as those supported by 8086  32-bit modes (shown before) »supported by Pentium »more flexible set

2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi Chapter 11: Page 8 32-Bit Addressing Modes These addressing modes use 32-bit registers Segment + Base + (Index * Scale) + displacement CSEAXEAX1no displacement SSEBXEBX28-bit displacement DSECXECX432-bit displacement ESEDXEDX8 FSESIESI GSEDIEDIEBP ESP

2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi Chapter 11: Page 9 Differences between 16- and 32-bit Modes 16-bit addressing32-bit addressing Base registerBX, BPEAX, EBX, ECX, EDX, ESI, EDI, EBP, ESP Index registerSI, DIEAX, EBX, ECX, EDX, ESI, EDI, EBP Scale factorNone1, 2, 4, 8 Displacement0, 8, 16 bits0, 8, 32 bits

2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi Chapter 11: Page bit or 32-bit Addressing Mode? How does the processor know? Uses the D bit in the CS segment descriptor D = 0 »default size of operands and addresses is 16 bits D = 1 »default size of operands and addresses is 32 bits We can override these defaults  Pentium provides two size override prefixes 66Hoperand size override prefix 67Haddress size override prefix Using these prefixes, we can mix 16- and 32-bit data and addresses

2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi Chapter 11: Page 11 Examples: Override Prefixes Our default mode is 16-bit data and addresses Example 1: Data size override mov AX,123 ==> B8 007B mov EAX,123 ==> 66 | B B Example 2: Address size override mov AX,[EBX*ESI+2] ==> 67 | 8B0473 Example 3: Address and data size override mov EAX,[EBX*ESI+2] ==> 66 | 67 | 8B0473

2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi Chapter 11: Page 12 Memory Addressing Modes Direct addressing mode  Offset is specified as part of the instruction –Assembler replaces variable names by their offset values –Useful to access only simple variables Example total_marks = assign_marks + test_marks + exam_marks translated into mov EAX,assign_marks add EAX,test_marks add EAX,exam_marks mov total_marks,EAX

2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi Chapter 11: Page 13 Memory Addressing Modes (cont’d) Register indirect addressing mode  Effective address is placed in a general-purpose register  In 16-bit segments »only BX, SI, and DI are allowed to hold an effective address add AX,[BX] is valid add AX,[CX] is NOT allowed  In 32-bit segments »any of the eight 32-bit registers can hold an effective address add AX,[ECX] is valid

2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi Chapter 11: Page 14 Memory Addressing Modes (cont’d) Default Segments  16-bit addresses »BX, SI, DI : data segment »BP, SP : stack segment  32-bit addresses »EAX, EBX, ECX, EDX, ESI, EDI: data segment »EBP, ESP: stack segment Possible to override these defaults  Pentium provides segment override prefixes

2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi Chapter 11: Page 15 Based Addressing Effective address is computed as base + signed displacement  Displacement: –16-bit addresses: 8- or 16-bit number –32-bit addresses: 8- or 32-bit number Useful to access fields of a structure or record »Base register  points to the base address of the structure »Displacement  relative offset within the structure Useful to access arrays whose element size is not 2, 4, or 8 bytes »Displacement  points to the beginning of the array »Base register  relative offset of an element within the array

2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi Chapter 11: Page 16 Based Addressing (cont’d)

2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi Chapter 11: Page 17 Indexed Addressing Effective address is computed as (index * scale factor) + signed displacement  16-bit addresses: –displacement: 8- or 16-bit number –scale factor: none (i.e., 1)  32-bit addresses: –displacement: 8- or 32-bit number –scale factor: 2, 4, or 8 Useful to access elements of an array (particularly if the element size is 2, 4, or 8 bytes) »Displacement  points to the beginning of the array »Index register  selects an element of the array (array index) »Scaling factor  size of the array element

2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi Chapter 11: Page 18 Indexed Addressing (cont’d) Examples add AX,[DI+20] –We have seen similar usage to access parameters off the stack (in Chapter 10) add AX,marks_table[ESI*4] –Assembler replaces marks_table by a constant (i.e., supplies the displacement) –Each element of marks_table takes 4 bytes (the scale factor value) –ESI needs to hold the element subscript value add AX,table1[SI] –SI needs to hold the element offset in bytes –When we use the scale factor we avoid such byte counting

2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi Chapter 11: Page 19 Based-Indexed Addressing Based-indexed addressing with no scale factor Effective address is computed as base + index + signed displacement Useful in accessing two-dimensional arrays »Displacement  points to the beginning of the array »Base and index registers point to a row and an element within that row Useful in accessing arrays of records »Displacement  represents the offset of a field in a record »Base and index registers hold a pointer to the base of the array and the offset of an element relative to the base of the array

2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi Chapter 11: Page 20 Based-Indexed Addressing (cont’d) Useful in accessing arrays passed on to a procedure »Base register  points to the beginning of the array »Index register  represents the offset of an element relative to the base of the array Example Assuming BX points to table1 mov AX,[BX+SI] cmpAX,[BX+SI+2] compares two successive elements of table1

2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi Chapter 11: Page 21 Based-Indexed Addressing (cont’d) Based-indexed addressing with scale factor Effective address is computed as base + (index * scale factor) + signed displacement Useful in accessing two-dimensional arrays when the element size is 2, 4, or 8 bytes »Displacement ==> points to the beginning of the array »Base register ==> holds offset to a row (relative to start of array) »Index register ==> selects an element of the row »Scaling factor ==> size of the array element

2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi Chapter 11: Page 22 Illustrative Examples Insertion sort  ins_sort.asm  Sorts an integer array using insertion sort algorithm »Inserts a new number into the sorted array in its right place Binary search  bin_srch.asm  Uses binary search to locate a data item in a sorted array »Efficient search algorithm

2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi Chapter 11: Page 23 Arrays One-Dimensional Arrays Array declaration in HLL (such as C) int test_marks[10]; specifies a lot of information about the array: »Name of the array ( test_marks ) »Number of elements (10) »Element size (2 bytes) »Interpretation of each element ( int i.e., signed integer) »Index range (0 to 9 in C) You get very little help in assembly language!

2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi Chapter 11: Page 24 Arrays (cont’d) In assembly language, declaration such as test_marks DW 10 DUP (?) only assigns name and allocates storage space.  You, as the assembly language programmer, have to “properly” access the array elements by taking element size and the range of subscripts. Accessing an array element requires its displacement or offset relative to the start of the array in bytes

2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi Chapter 11: Page 25 Arrays (cont’d) To compute displacement, we need to know how the array is laid out »Simple for 1-D arrays Assuming C style subscripts displacement = subscript * element size in bytes If the element size is 2, 4, or 8 bytes  a scale factor can be used to avoid counting displacement in bytes

2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi Chapter 11: Page 26 Multidimensional Arrays We focus on two-dimensional arrays »Our discussion can be generalized to higher dimensions A 5  3 array can be declared in C as int class_marks[5][3]; Two dimensional arrays can be stored in one of two ways:  Row-major order –Array is stored row by row –Most HLL including C and Pascal use this method  Column-major order –Array is stored column by column –FORTRAN uses this method

2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi Chapter 11: Page 27 Multidimensional Arrays (cont’d)

2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi Chapter 11: Page 28 Multidimensional Arrays (cont’d) Why do we need to know the underlying storage representation? »In a HLL, we really don’t need to know »In assembly language, we need this information as we have to calculate displacement of element to be accessed In assembly language, class_marks DW 5*3 DUP (?) allocates 30 bytes of storage There is no support for using row and column subscripts »Need to translate these subscripts into a displacement value

2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi Chapter 11: Page 29 Multidimensional Arrays (cont’d) Assuming C language subscript convention, we can express displacement of an element in a 2-D array at row i and column j as displacement = (i * COLUMNS + j) * ELEMENT_SIZE where COLUMNS = number of columns in the array ELEMENT_SIZE = element size in bytes Example:Displacement of class_marks[3,1] element is (3*3 + 1) * 2 = 20

2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi Chapter 11: Page 30 Examples of Arrays Example 1 One-dimensional array »Computes array sum (each element is 4 bytes long e.g., long integers) »Uses scale factor 4 to access elements of the array by using a 32-bit addressing mode (uses ESI rather than SI) »Also illustrates the use of predefined location counter $ Example 2 Two-dimensional array »Finds sum of a column »Uses “based-indexed addressing with scale factor” to access elements of a column

2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi Chapter 11: Page 31 Recursion A recursive procedure calls itself  Directly, or  Indirectly Some applications can be naturally expressed using recursion factorial(0) = 1 factorial (n) = n * factorial(n  1) for n > 0 From implementation viewpoint  Very similar to any other procedure call »Activation records are stored on the stack

2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi Chapter 11: Page 32 Recursion (cont’d)

2003 To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi Chapter 11: Page 33 Recursion (cont’d) Example 1  Factorial »Discussed before Example 2  Quicksort (on an N-element array)  Basic algorithm »Selects a partition element x »Assume that the final position of x is array[i] »Moves elements less than x into array[0]…array[i  1] »Moves elements greater than x into array[i+1]…array[N  1] »Applies quicksort recursively to sort these two subarrays Last slide