Embedded Systems Architecture Class Project USB 2.0 Function Controller December 12, 2008 Brandon Wolfe, Ben Marrou, Daniel Chan.

Slides:



Advertisements
Similar presentations
System Integration and Performance
Advertisements

Primary Author: Girish Verma Secondary Author(s): Navya Prabhakar Presenter: Navya Prabhakar Company/Organization: CircuitSutra USB Modeling Quick Start.
INPUT-OUTPUT ORGANIZATION
Dr. Rabie A. Ramadan Al-Azhar University Lecture 3
Universal Serial Bus Grant Heileman. The History of USB In 1994 a collaborative effort to design a standard for peripheral devices was made between Compaq,
PH4705 ET4305 Interface Standards A number of standard digital data interfaces are used in measurement systems to connect instruments and computers for.
USB: Data Flow Sukesh Shenoy. USB implementation areas.
Architectural Support for Operating Systems. Announcements Most office hours are finalized Assignments up every Wednesday, due next week CS 415 section.
USB – An Overview Group 3 Kaushik Nandha Bikram What is the Universal Serial bus (USB)? Is a cable bus that supports data exchange between a host computer.
1 COMP541 Interrupts, DMA, Serial I/O Montek Singh April 24, 2007.
Review on Networking Technologies Linda Wu (CMPT )
Anush Rengarajan Feng Zheng Thomas Madaelil
USB 2.0 INTRODUCTION NTUT CSIE 學 生:許家豪 指導教授:柯開維教授.
CPU Chips The logical pinout of a generic CPU. The arrows indicate input signals and output signals. The short diagonal lines indicate that multiple pins.
Introduction to USB. 2 Agenda Introduction to USB LPC23xx Block diagram MCB2300 demo.
Local Asynchronous Communications. Bit-wise data transmission Data transmission requires: Encoding bits as energy Transmitting energy through medium Decoding.
USB: UNIVERSAL SERIAL BUS Joe Kaewbaidhoon Alex Motalleb Vishal Joshi Prepared for EECS 373 University of Michigan, Ann Arbor 1.
Copyright ©: Nahrstedt, Angrave, Abdelzaher
Compact Flash for CoolRunner™-II CPLDs. Quick Start Training Agenda Introduction What is Compact Flash? CoolRunner-II Implementation Block Diagram Applications.
I/O Tanenbaum, ch. 5 p. 329 – 427 Silberschatz, ch. 13 p
INPUT-OUTPUT ORGANIZATION
USB Josh Rickmar John Marcoux. Topics Purpose and Goals History Bus Design Power Differential Signaling Connectors Changes in USB 3.0.
Peripheral Buses COMP Jamie Curtis. PC Buses ISA is the first generation bus 8 bit on IBM XT 16 bit on 286 or above (16MB/s) Extended through.
May 8, The EASY Way to Create I/O Devices John Hyde Intel Corporation intel.com.
Bluetooth based home automation system N.Sriskanthan, F.Tan, K. Karande Microprocessors and Microsystems 26(2002) Presenter: Bui Phuong Nhung.
Spring 2014 SILICON VALLEY UNIVERSITY CONFIDENTIAL 1 Introduction to Embedded Systems Dr. Jerry Shiao, Silicon Valley University.
May 17, USB2.0 Host Controller John S. Howard Staff Engineer Intel Architecture Labs Intel Corporation.
Introduction Electrical Considerations Data Transfer Synchronization Bus Arbitration VME Bus Local Buses PCI Bus PCI Bus Variants Serial Buses 11/06/20141Input/Output.
Chapter 8 Input/Output. Busses l Group of electrical conductors suitable for carrying computer signals from one location to another l Each conductor in.
Peripheral Busses COMP Jamie Curtis. PC Busses ISA is the first generation bus 8 bit on IBM XT 16 bit on 286 or above (16MB/s) Extended through.
Introduction to USB Development. USB Development Introduction Technical Overview USB in Embedded Systems Recent Developments Extensions to USB USB as.
Introduction to USB © 2010 Renesas Electronics America Inc. All rights reserved.
USB host for web camera connection
ECE 371 – UNIT 20 Universal Serial Bus (USB). References 1. Universal Serial Bus Specification, Revision 2.0. This specification is available on the World.
Input/OUTPUT [I/O Module structure].
LOGO BUS SYSTEM Members: Bui Thi Diep Nguyen Thi Ngoc Mai Vu Thi Thuy Class: 1c06.
Microprocessor-based Systems
MICROPROCESSOR INPUT/OUTPUT
1 Lecture 20: I/O n I/O hardware n I/O structure n communication with controllers n device interrupts n device drivers n streams.
DEVICES AND COMMUNICATION BUSES FOR DEVICES NETWORK
CS 342 – Operating Systems Spring 2003 © Ibrahim Korpeoglu Bilkent University1 Input/Output CS 342 – Operating Systems Ibrahim Korpeoglu Bilkent University.
A Comparative Study of the Linux and Windows Device Driver Architectures with a focus on IEEE1394 (high speed serial bus) drivers Melekam Tsegaye
Lecture 3 Process Concepts. What is a Process? A process is the dynamic execution context of an executing program. Several processes may run concurrently,
BR 6/001 Universal Serial Bus Universal Serial Bus is a new synchronous serial protocol for low to medium speed data transmission Full speed signaling.
I/O Computer Organization II 1 Interconnecting Components Need interconnections between – CPU, memory, I/O controllers Bus: shared communication channel.
Data Communications (E&T2760): USB and IEEE USB and IEEE 1394.
ATtiny23131 A SEMINAR ON AVR MICROCONTROLLER ATtiny2313.
Chapter 7 Larger Systems and the PIC 16F873A The aims of this chapter are to introduce: The architecture of the 16F873A microcontroller; The 16F873A memory.
Interrupt driven I/O. MIPS RISC Exception Mechanism The processor operates in The processor operates in user mode user mode kernel mode kernel mode Access.
12/8/20151 Operating Systems Design (CS 423) Elsa L Gunter 2112 SC, UIUC Based on slides by Roy Campbell, Sam King,
Chapter 13 – I/O Systems (Pgs ). Devices  Two conflicting properties A. Growing uniformity in interfaces (both h/w and s/w): e.g., USB, TWAIN.
Intel Open Source Technology Center Lu Baolu 2015/09
Digital Computer Concept and Practice Copyright ©2012 by Jaejin Lee Control Unit.
Interrupt driven I/O Computer Organization and Assembly Language: Module 12.
1 COMP541 Interrupts, DMA, Serial I/O Montek Singh April 13, 2010.
1 Device Controller I/O units typically consist of A mechanical component: the device itself An electronic component: the device controller or adapter.
Computer Networks & Digital Lab project. In cooperation with Mellanox Technologies Ltd. Guided by: Crupnicoff Diego & Gurewitz Omer. Students: Cohen Erez,
USB Universal Serial Bus. University of Tehran 2.
Chapter 6 Input/Output Organization
USB The topics covered, in order, are USB background
USB PHYISICAL LAYER PROTOCOL ENGINE LAYER APPLICATION LAYER
Operating Systems (CS 340 D)
USB Universal Serial Bus
The PCI bus (Peripheral Component Interconnect ) is the most commonly used peripheral bus on desktops and bigger computers. higher-level bus architectures.
Universal Serial Bus Specification 1.0
USB- Universal Serial Bus
USB : Universal Serial Bus
Operating Systems Chapter 5: Input/Output Management
Overview of Computer Architecture and Organization
Universal Serial Bus (USB)
Presentation transcript:

Embedded Systems Architecture Class Project USB 2.0 Function Controller December 12, 2008 Brandon Wolfe, Ben Marrou, Daniel Chan

Contents Project Objectives USB Overview Hardware Implementation Software Driver Implementation

Project Objectives Configure USB 2.0 Function Controller from opencores.org to use on lab FPGA board. Develop a low-level driver to initialize USB 2.0 Function Controller registers. Implement driver functions to allow basic communication with a USB host.

USB Overview USB Version 1.0 –Low Speed (1.5 Mb/s) –Full Speed (12 Mb/s) USB Version 2.0 –High Speed (480 Mb/s) USB Version 3.0 –Super Speed (5 Gb/s)

Transfer Data Types Control –Configure, Get information, Status. –Small data transfers. –Endpoint 0. Interrupt –Small data, fixed rate. –For devices needing guaranteed response time. –Ex: Mice, Keyboard. Bulk –Large amounts of data, up to bus bandwidth. –Guaranteed data delivery, but not speed. –Ex: Scanners, Storage, Network devices. Isochronous –Large amounts of data. –Guaranteed speed, but not data delivery. –Ex: Audio, Video.

USB Descriptors Device – Includes USB revision, product and vendor IDs examples: fax/scanner/printer device Configuration – The state of the device examples: active, sleep Interface – Performs a feature of the device examples: scan function, print function Endpoint – Specifies the type of data transfer (pipes) examples: control, bulk

USB Descriptor Example Fax/Scanner/Printer ActiveSleep ScanPrint ControlBulkControlBulk Device: Configuration: Interface: Endpoint: (0) (1)

USB Connectors Series “A” –plug (upstream) –receptacle (downstream) Series “B” –plug (downstream) –receptacle (upstream) Series “mini-B” –plug (downstream) –receptacle (upstream)

USB Block Diagram USB Function Controller - management of data/control message flow PHY - link between digital logic and analog bus Driver Microcontroller USB 2.0 Function Controller (peripheral) USB PHY “mini-B” ULPI D+ D-

Major hardware Components: As implemented in RTL from USB Opencore Additional implemented RTL Register R/W Memory R/W ULPI-to-UTMI Wrapper Hardware Implementation

RTL from USB Opencore Clock Domain 1 : 60Mhz Clock Domain 2 : 100Mhz Hardware Implementation cont. Reference: opencores.org

Register R/W Registers

Memory R/W Memory Reference: opencores.org

Memory R/W Memory cont.

ULPI-to-UTMI Wrapper # # USB # # NET USB_IO0 LOC = E22; # NET USB_IO1 LOC = D22; # NET USB_IO2 LOC = C22; # NET USB_IO3 LOC = D21; # NET USB_IO4 LOC = C21; # NET USB_IO5 LOC = D20; # NET USB_IO6 LOC = D19; # NET USB_IO7 LOC = C19; NET "PHY_CLK" LOC = "D18"; NET "PHY_STP" LOC = "C18"; NET "PHY_DIR" LOC = "D17"; NET "PHY_NXT" LOC = "C17"; NET "PHY_RESET" LOC = "E17"; PHY Interface

ULPI-to-UTMI Wrapper PHY Interface cont. Reference: SMSC

ULPI-to-UTMI Wrapper PHY Interface cont. Reference: SMSC

ULPI-to-UTMI Wrapper PHY Interface cont. Reference: USB in a NutShell

Revised Intentions for Software 1.Develop low-level driver to initialize USB Function Controller registers. 2.Implement driver functions to register USB driver with Linux USB core. 3.Understand (and implement) additional USB driver structures and functions.

USB Function Controller Driver Register Initialization USB Driver Registration USB Driver Communication USB Driver Deregistration

Significant Registers ENDPOINT REGISTERS NameOffsetWidthAccessDescription EP0_CSR4032RW Endpoint 0: CSR EP0_IMS4432RW Endpoint 0: Interrupt Mask Register EP0_BUF04832RW Endpoint 0: Buffer Register 0 EP0_BUF14c32RW Endpoint 0: Buffer Register 1 EPx Registers  Exist for each Endpoint (0 – 16) GLOBAL REGISTERS NameOffsetWidthAccessDescription CSR08RW Control/Status Register FA48RW Function Address INT_MSK832RW Interrupt Mask for Endpoint Independent Sources INT_SRCC32ROC Interrupt Source Register FRM_NAT1032RO Frame Number and Time (SOF) Reference: opencores.org

Core Register Descriptions CSR –Primary configuration and status register for USB core. Function Address (FA) –Set by exchanging control and status information with host. INT_MSK –Interrupt mask register controls function of interrupt pins. FRM_NAT –Frame number and time register, tracks frame number/time received from SOF.

Endpoint Register Descriptions EPx_CSR –Endpoint control and status register, specify its operation mode. EPx_IMS –Endpoint interrupt mask (i.e. how endpoint responds to generated interrupts). EPx_BUF –Hold buffer pointers for each endpoint. Two for each endpoint (BUF0, BUF1).

Register Breakdown CSR (core) EP0_CSR Bit DescriptionRESERVEDUTMISTSSPDSUS ValueRO Bit DescriptionBSELUC_DPDEP_TYPETR_TYPEEP_DISEP_NOLGSM Value Bit DescriptionDMAROOTSTR_FRMAX_PL_SZ Value Status 0: Unattached 1: Attached Speed 0: Full 1: High Endpoint Type 00: Control 01: IN 10: OUT 11: RSVD Transfer Type 00: Interrupt 01: Isochronous 10: Bulk 11: RSVD

Register Initialization USB Function Controller is memory mapped to address 0xCC Assignments to / from offsets of this address will access the function controller registers. Write: –Register Read –Bit AND / OR –Register Write READ READ / WRITE

USB Declaration & Registration Device Driver must declare itself with OS (Linux) USB core. Struct USB_Driver serves this purpose, by providing basic function information. Additional functionality supported via Struct File_Operations.

USB Driver Registration Struct usb_device_id Actual Registration

insmod usbf.ko Loading the driver on the lab FPGA… Set EP0_CSR Registration with usbcore

Probe() Function Called by Linux USB core when a device, matching the information provided in the id_table variable, is seen. –Check if driver will manage the specific device interface. Work typically done in this function: –Initializing local structures and buffers. –Detect endpoint addresses. –usb_set_intfdata(), usb_get_intfdata(). Return 0 (Accept) or Negative (Reject). Reference: linuxjournal.com

USB Driver Communication The driver is loaded and the device is initialized and registered with USB core. It’s time to use it! Two methods: –URBs (USB Request Block). –Non-URB alternatives.

What is an URB? Structures used by the driver to asynchronously send or receive data to or from a specific USB endpoint. –Similar to packets in networking. Formal methods and structures to creating, submitting, executing, and completing URBs. Notion of “Pipes”: Control, Bulk, Interrupt, and Isochronous.

Lifecycle of an URB Reference: Free-Electrons.com

Alternatives to URBs Basic functions exist within USB core to allow data transfer without URBs. –usb_bulk_msg() –usb_control_msg() Caters to ease of use, however, affords less control over the transfer. –Requests cannot be cancelled. –Synchronously performed, put code to sleep.

Disconnect() Function Called by Linux USB core when a device, matching the information provided in the id_table variable, is removed. Work typically done in this function: –Clean up any private data during its operation. –Close out pending transfers or URBs. Reference: linuxjournal.com

USB Deregistration Lastly, when the driver is unloaded or device is removed, the module deregisters. Deregistration

THE END Questions?

BACKUP

Original Intentions for Software 1.Develop low-level driver to initialize USB Function Controller registers. 2.Implement driver functions to allow very basic communication with a USB host.

Software Challenges New to Driver (and USB) development. –New concepts: Descriptors, URBs, Linux USB core and handshaking. Understanding USB Function Controller. –Some function controllers can operate as a host controller, which alters the driver’s role. Limited knowledge of USB Specification.

Assumptions USB Function Controller is used for a peripheral (slave) device. Controller uses only 3 of 16 available endpoints. –0: Control –1: IN –2: OUT

USB Cable 4 Wires (Data+/-, Vbus, Gnd) Data Signals are Twisted Pair Reference: