Washing Machine SolutionsAffordable Intelligent Motion SenseTile Hardware Design Review 1 CASL, UCD, 12 December 2008 2 Confidential mSemicon & UCD 29/08/2015.

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Presentation transcript:

Washing Machine SolutionsAffordable Intelligent Motion SenseTile Hardware Design Review 1 CASL, UCD, 12 December Confidential mSemicon & UCD 29/08/2015

Agenda Current status of design work Description of design Extra features Dimensions Schedule 3 Confidential mSemicon & UCD 29/08/2015

Current Status of Design Work Schematic has been completed about 99%  All on-board electronic components selected Only issue remaining relates to selection of connectors  Some other minor issues  Some feedback required on mechanical issues Following today’s review, layout is expected to begin immediately 4 Confidential mSemicon & UCD 29/08/2015

General Description of Design The schematic is divided into eight separate sheets describing:  CODEC / ADC circuit  FPGA circuit  Audio and ultrasonic inputs  Audio input circuitry (Input 1)  General input circuitry (Input 2)  Microcontroller circuitry  Output circuitry  Power supply circuitry  (Prior USB circuitry, to be removed)  New USB circuitry 5 Confidential mSemicon & UCD 29/08/2015

CODEC / ADC Design based on two devices: ADC for simultaneous sampling (for non-audio applications)  ADS1174/8  For slowly changing signals: DC to 4kHz sampling  Four channel CODEC  AD1937  Very high performance: high speed  Built-in audio filters  Extremely low noise 6 Confidential mSemicon & UCD 29/08/2015

FPGA Design based on Xilinx XC3S250 (Spartan) General purpose FPGA Configuration by:  JTAG (during development)  SPI (direct, during test and development);  SPI can be directly updated by USB (i.e. not through the microcontroller) on deployment 7 Confidential mSemicon & UCD 29/08/2015

Audio Input Circuitry – Input 1 Catering for audio range (2) and ultrasonic range (2) Number of total usable inputs depends on sample rate Extremely low noise amplifiers 8 Confidential mSemicon & UCD 29/08/2015

General Input Circuitry - Input 2 Catering for general inputs from sensors and switches Four analogue inputs Eight digital I/O  User configurable via microcontroller 9 Confidential mSemicon & UCD 29/08/2015

Microcontroller Circuit Based on STM32F103V9 Cortex device from ST  Latest generation Cortex ARM processor  Built in RAM/Flash  Multifunction I/O  JTAG programmable in-circuit debugger RS 232 debug port, allowing external programming of micro flash GSM port 10 Confidential mSemicon & UCD 29/08/2015

Output Circuitry Drivers for speakers  Audio  Ultrasonic On board relays (2) IR LED drivers (shown on FPGA sheet) IR detection to be added 11 Confidential mSemicon & UCD 29/08/2015

Power Supply Works on 12-30V dc in Generated on board: 1.2V, 2.5V (linear), 3.3V x 2, 5V, -11V, +11V Point of load power supply design  FPGA powered separately  Analogue circuitry powered separately  Microcontroller can operate on its own Current sensor on board, monitoring total current consumption  Information processed by microcontroller 12 Confidential mSemicon & UCD 29/08/2015

(Prior USB Design) Until last few weeks, USB was run on a MCS7840  Four channel UART to USB device  Satisfied requirements, but Heavy load on FPGA Mandated FPGA programming indirectly A new device is becoming available now, and will be used instead 13 Confidential mSemicon & UCD 29/08/2015

New USB Ciruitry FTDI USB-high speed data port A new electronic device is being sampled at the moment, and will enter production “in March 2009” which, on board, would allow:  Direct programming of the SPI  Direct access to generalised I/O  CPU high-speed parallel bus interface (asynchronous)  Four fold (+) increase in performance Host can talk directly to the FPGA via file transfer 14 Confidential mSemicon & UCD 29/08/2015

Extra Features Adding a port for a display:  Considering making provision for LCD display  This enables easier autonomous use of device  Display itself not installed on boards Other features being considered and, if possible, included 15 Confidential mSemicon & UCD 29/08/2015

Current Draft Connector Requirements 16 Confidential mSemicon & UCD 29/08/2015 ConnectorType of Socket PowerStandard USB (1)USB-B Acoustic microphone (4) [high perf.] 3.5mm jack Acoustic speaker (1)3.5mm jack Ultrasonic speaker (1)3.5mm jack Ultrasonic microphones (4)3.5mm jack Digital I/OIDC 0.1” Relay contactsIDC 0.1” Analog expansion slotIDC 0.1” External DC power supply3.1mm power

Connectors – Sensor Inputs The selection of connectors influences overall board size  Try to be as compact as possible  Another requirement is that special mating connectors should not be necessary – for R&D work A suitable connector style is the DIN  Can take up to 8 wires in one unit  Suitable for sensor inputs  Rotates and locks into position  Wires can be soldered onto mating part This type proposed for simultaneous inputs 17 Confidential mSemicon & UCD 29/08/2015

Connectors – Power Board uses 12V in, but also supplies 12V out to feed Processor Unit  Requires compact multi-pole solution Needs to be robust, and not subject to loosening due to vibration  Needs to snap into position Propose Mini-Fit Jr™ 5569 from Molex  Or equivalent from Würth 18 Confidential mSemicon & UCD 29/08/2015

Audio I/O – Audible and Ultrasonic Both pairs of microphones will be installed on daughterboard(s)  “Both” meaning audible and ultrasonic Main board will be upside-down  Daughterboard will be suspended underneath The relative orientation of daughter-boards, if two, has to be decided Alternative could be a small single board with four microphones, pairs mounted at extremities 19 Confidential mSemicon & UCD 29/08/2015

Dimensions Circuit board layout not started yet  Connectors have a very important bearing on overall size Issue to be settled  Orientation of PIR sensor and microphone daughterboard important Propose DIN style for general inputs  Can accommodate 4 pairs each Dimensions are expect to be in the range of 120mm x 170mm 20 Confidential mSemicon & UCD 29/08/2015

Near-term Schedule Layout to begin 15/12/08 Scheduled to finish late January Bare boards available first week of February Will be built up and debugged gradually  HW: PS, processor,...  SW: Linux USB driver (SPI & CPU bus), FPGA VHDL (in progress), Micro board support Best case scenario is 6 weeks after board arrives for first sample  With partial driver and board support package functionality Likely scenario is 9 weeks after board arrives for first sample 21 Confidential mSemicon & UCD 29/08/2015