المملكة العربية السعودية وزارة التعليم العالي - جامعة أم القرى كلية الهندسة و العمارة الإسلامية قسم الهندسة الكهربائية ELECTRONIC DEVICES K INGDOM OF S AUDI A RABIA Ministry of Higher Education Umm Al-Qura University College of Engineering and Islamic Architecture Electrical Engineering Department Lecture 9 By: Dr Tarek Abdolkader

15/5/1433Electronic devices (802311) Lecture 8 Dr Tarek Abdolkader At the end of this lecture, the student should be able to: 1.Describe the construction of Junction Field-Effect Transistor (JFET) and its symbol 2.Compare BJT to FET 3.Explain the operation of JFET 4.Demonstrates the drain characteristics of JFET 5.Demonstrates the transfer characteristics of JFET 6.Define the different parameters of JFET:  pinch-off voltage  drain saturation current  cutoff gate-to-source voltage  Trans-conductance  AC drain-to-source resistance 7.Describe the different methods of JFET biasing and their advantages/disadvantages  Self-biasing  Voltage-divider biasing  Constant current source biasing 2

15/5/1433Electronic devices (802311) Lecture 8 Dr Tarek Abdolkader3 Field effect devices are those in which current is controlled by the action of an electric field, rather than carrier injection. The FET was known as a “ unipolar ” transistor. The term refers to the fact that current is transported by carriers of one polarity (majority), whereas in the conventional bipolar transistor carriers of both polarities (majority and minority) are involved. The family of FET devices may be divided into : Junction FET (JFET) and Metal-Oxide-Semiconductor FET (MOSFET) In previous lectures, we studied bipolar transistors, which utilize a small current to control a large current. We'll introduce the general concept of the field-effect transistor - a device utilizing a small voltage to control current

15/5/1433Electronic devices (802311) Lecture 8 Dr Tarek Abdolkader4 JFET consists of a piece of high-resistivity semiconductor material (usually Si) which constitutes a channel for the majority carrier flow. Current is to flow through the channel between two contacts – source & drain (they are interchangeable)

15/5/1433Electronic devices (802311) Lecture 8 Dr Tarek Abdolkader5 Gate should be reverse-biased. The voltage applied on the gate terminal controls the resistance of the channel and thus controls the current passing from source to drain There are two types of JFET: n-channel and p-channel. (n-channel is more efficient because electrons have higher mobility than holes)

15/5/1433Electronic devices (802311) Lecture 8 Dr Tarek Abdolkader6 V DD provides a drain-to-source voltage and supplies current from drain to source. V GG sets a reverse bias between the gate and the source. Reverse bias from gate to source increases the depletion layer. This restricts the channel width and increases the channel resistance and decreases the drain-to- source current ( I DS ) Effect of changing V GS

15/5/1433Electronic devices (802311) Lecture 8 Dr Tarek Abdolkader7 At small reverse bias V GS, the channel is wide enough to pass large currents At sufficiently large reverse bias V GS ( V GS(off) ), the channel is extremely thin and current is nearly zero Note that the depletion layer is wider near the drain than near the source With the absolute value of V GS below V GS(off), the current depends on V DS. | V GS | < | V GS(off) || V GS | > | V GS(off) | Effect of changing V GS

15/5/1433Electronic devices (802311) Lecture 8 Dr Tarek Abdolkader8 For V GS = 0, the value of V DS at which I DS saturates (point B) is called the pinch-off voltage V P. For a given JFET, V P has a fixed value At sufficiently large drain bias V DS (point C), the current is increasing rapidly and transistor is damaged (breakdown) V P = ‒ V GS(off) Effect of changing V DS If | V GS | << | V GS(off) |, the width of channel is large. Thus, at small values of V DS the change of V DS does not change the channel width/resistance appreciably (this is called the linear region). However, with V DS is sufficiently large, the width at the drain side will decrease more and the current will saturate

15/5/1433Electronic devices (802311) Lecture 8 Dr Tarek Abdolkader9 Actually, the current at saturation is changing very little. The AC drain-to-source resistance is defined by:

15/5/1433Electronic devices (802311) Lecture 8 Dr Tarek Abdolkader10 The relation between the output current ( I DS ) at saturation and the input voltage ( V GS ) is called the transfer characteristics The saturation drain current at V GS = 0 is I DSS (nonlinear relation)

15/5/1433Electronic devices (802311) Lecture 8 Dr Tarek Abdolkader11 The JFET trans-conductance is defined by The trans-conductance is aimed to be as high as possible The trans-conductance is not constant but depends on V GS.

15/5/1433Electronic devices (802311) Lecture 8 Dr Tarek Abdolkader12 V DD = 10.7 V I D = 0 For the JFET shown, V GS(off) = ‒ 4 V, I DSS = 12 mA. Determine the minimum value of V DD required to put the device in the constant-current region of operation. A particular p-channel JFET has a V GS(off) = +4 V, What is I D when V GS = +6 V?

15/5/1433Electronic devices (802311) Lecture 8 Dr Tarek Abdolkader13 I D = 9, 6.89, 2.25 mA From the data sheet of the 2N5459, JFET shown, V GS(off) = ‒ 8 V, I DSS = 9 mA. Using these values, determine the drain current for V GS = 0, ‒ 1, ‒ 4 V From the data sheet of the 2N5459, JFET shown, V GS(off) = ‒ 6 V, I DSS = 3 mA, g fS(max) = 5000 μS. Using these values, determine the forward transconductance for V GS = ‒ 4 V and find the drain current at this point. g m = 1667 μS I D = 333 μA

15/5/1433Electronic devices (802311) Lecture 8 Dr Tarek Abdolkader14 Gate terminal is connected to ground through resistance R G. A supply voltage of + V DD is connected for n-channel JFET and ‒ V DD for p-channel JFET. Self-Bias: It is usually desirable to bias the JFET near the midpoint of its transfer characteristics (at I D = I DSS /2). This allows the maximum amount of current swing between 0 and I DSS. At this current value, V GS = V GS(off) /3.4.

15/5/1433Electronic devices (802311) Lecture 8 Dr Tarek Abdolkader15 Determine the value of R S required to self-bias an n- channel JFET that has the transfer characteristics shown at V GS = ‒ 5 V.

15/5/1433Electronic devices (802311) Lecture 8 Dr Tarek Abdolkader16 Determine the value of R S required to self-bias a p-channel JFET with V GS(off) = 15 V, I DSS = 25 mA. V GS is to be 5 V.

15/5/1433Electronic devices (802311) Lecture 8 Dr Tarek Abdolkader17 Select the resistor values R S and R D in figure to set up an approximate midpoint bias. V GS(off) = ‒ 3V V, I DSS = 12 mA. V D should be approximately one half of V DD (6 V).

15/5/1433Electronic devices (802311) Lecture 8 Dr Tarek Abdolkader18 Gate terminal is connected to voltage-divider between V DD and ground. A supply voltage of + V DD is connected for n- channel JFET and ‒ V DD for p-channel JFET. Voltage-divider Bias:

15/5/1433Electronic devices (802311) Lecture 8 Dr Tarek Abdolkader19 Determine I D and V GS for the circuit shown given that V D is to be approximately 7 V.

15/5/1433Electronic devices (802311) Lecture 8 Dr Tarek Abdolkader20 Gate terminal is connected to ground through a resistance R G. Source terminal is connected to constant current source. Current-source Biasing: If V DD = 9 V and V EE = ‒ 6 V, what are the values of R E and R D required to produce I D = 10 mA and V D = 5 V. R E = 530 Ω

15/5/1433Electronic devices (802311) Lecture 8 Dr Tarek Abdolkader21 I D is constant (does not depend on V GS ) Graphyical analysis Constant current source biasing satisfies the highest stability but it needs a negative power supply.

15/5/1433Electronic devices (802311) Lecture 8 Dr Tarek Abdolkader22 Graphyical analysis

15/5/1433Electronic devices (802311) Lecture 8 Dr Tarek Abdolkader23 BJTFET Carrier Bipolar (both electrons and holes are participating) Unipolar (Mainly one carrier) Control Input Current is controlling output current Input voltage is controlling output current Input currentsmallExtremely small Input impedanceRelatively lowRelatively high LinearityLinear (I c ≈ I b )Nonlinear (I D ≈ Vgs 2 ) High frequency operation better Worse due to its high input capacitance