2005 MAPLD, Paper 240 JJ Wang 1 Total Ionizing Dose Effect on Programmable Input Configurations J. J. Wang, R. Chan, G. Kuganesan, N. Charest, B. Cronquist Actel Corporation

2005 MAPLD, Paper 240 JJ Wang 2 Outline Total Ionizing Dose Testing Input Threshold TID Testing Data Annealing Effect Failure Analysis and Mechanism Lesson Learned and TID Hardening

2005 MAPLD, Paper 240 JJ Wang 3 Total Ionizing Dose Testing TM1019 Military Standard for TID testing (Fig 1) Pass Fail 3 Post-Irradiation Functional Test 4 Post-Annealing Electrical Tests 1 Pre-Irradiation Electrical Tests 2 Radiate to Specific Dose Redo Test Using Less Total Dose Fig 1 TID testing flow

2005 MAPLD, Paper 240 JJ Wang 4 DUT and Irradiation 0.25µm CMOS technology Commercial off-shore foundry V CCI/ V CCA = 5V/2.5V TTL I/O configuration Defense Microelectronic Activity (DMEA) Co-60 Source Dose Rate = 1 krad(Si)/min (±5%) Room temperature irradiation Static biased irradiation Fig 2 Picture showing Gamma-ray irradiator

2005 MAPLD, Paper 240 JJ Wang 5 Parameter Measurement ParametersLogic Design 1 FunctionalityAll key architectural functions 2 I CC (I CCA /I CCI )DUT power supply 3 Input Threshold (V IL /V IH )Input buffers 4 Output Drive (V OL /V OH )Output buffers 5 Propagation DelayString of buffers, Clock to Q 6 Transition CharacteristicD flip-flop output V IL defined as the start of low to high transition V IH defined as the start of high to low transition TTL trip point (average of V IL and V IH ) ~ 1.5V, CMOS ~ 2.5V

2005 MAPLD, Paper 240 JJ Wang 6 Rad-induced Input Threshold Shift Five (A, B, C, D, E in chronological order) lots from foundry X tested 2 lots (B, C) show V IL /V IH switching from TTL to CMOS The number of events increases with total accumulated dose and can be removed by annealing DUTTotal Dose Pre-IrradiationPost-Irradiation V IL (V)V IH (V)V IL (V)V IH (V) B1100 krad B2100 krad B3100 krad B4100 krad B5100 krad DUTTotal Dose Pre-IrradiationPost-Irradiation V IL (V)V IH (V)V IL (V)V IH (V) C160 krad C260 krad C360 krad C4100 krad C5100 krad C6100 krad C7100 krad C8100 krad Table 1 Lot B Pre- and Post-Irradiation V T (Net 0) Table 2 Lot C Pre- and Post-Irradiation V T (Net 0)

2005 MAPLD, Paper 240 JJ Wang 7 Post-Irradiation Input Threshold Switching from TTL to CMOS Lot C is chosen for investigation More design nets are tested for post-irradiation input threshold Part to part and pin to pin dependence observed DUTTotal Dose Net 1Net 2Net 3Net 4 V IL (V)V IH (V)V IL (V)V IH (V)V IL (V)V IH (V)V IL (V)V IH (V) C160krad NA C260krad C360krad C4100krad C5100krad C6100krad C7100krad C8100krad Table 3 Lot C Post-Irradiation V T

2005 MAPLD, Paper 240 JJ Wang 8 Post-Irradiation Input Threshold Switching from TTL to CMOS DUTTotal Dose Net 5Net 6Net 7Net 8 V IL (V)V IH (V)V IL (V)V IH (V)V IL (V)V IH (V)V IL (V)V IH (V) C160krad C260krad NA C360krad C4100krad C5100krad C6100krad NA C7100krad C8100krad Table 3 Lot C Post-Irradiation V T DUTTotal Dose Net 9Net 10Net 11 V IL (V)V IH (V)V IL (V)V IH (V)V IL (V)V IH (V) C160krad C260krad C360krad C4100krad C5100krad C6100krad C7100krad C8100krad

2005 MAPLD, Paper 240 JJ Wang 9 Annealing Effect Experiment DUT Total Dose Net 0Net 1Net 2Net 3Net 4Net 5 V IL (V)V IH (V)V IL (V)V IH (V)V IL (V)V IH (V)V IL (V)V IH (V)V IL (V)V IH (V)V IL (V)V IH (V) C9100krad C10100krad C11100krad C12100krad C13100krad DUT Total Dose Net 6Net 7Net 8Net 9Net 10Net 11 V IL (V)V IH (V)V IL (V)V IH (V)V IL (V)V IH (V)V IL (V)V IH (V)V IL (V)V IH (V)V IL (V)V IH (V) C9100krad C10100krad C11100krad C12100krad C13100krad Five DUT from lot C are irradiated to 100 krad with a lower dose rate (1 krad/hr) No switching from TTL to CMOS observed

2005 MAPLD, Paper 240 JJ Wang 10 Focus Ion Beam Experiment The internal node that is suspected being pulled down by radiation-induced leakage is FIB’ed for microprobing However, the heat generated during the FIB process annealed the device and hence recovered the TTL input threshold from CMOS

2005 MAPLD, Paper 240 JJ Wang 11 Fabrication Process Dependence Foundry X show TTL to CMOS switching in 2 out of 5 lots, more recent lots show no switching Foundry Y doesn’t show TTL to CMOS switching in 3 lots Variable material characteristics of the commercial foundry FOX (field oxide) determine the TID tolerance of this phenomenon

2005 MAPLD, Paper 240 JJ Wang 12 Configurable Input As shown in Figure below, a popular way to vary the input threshold is to change the strength of the pull-down by changing the turn-on number of NMOSFET pull-downs TTL (1.5V trip point) has more turn-on NMOSFET pull- downs than CMOS (2.5V trip point) PAD To core logic Configuration Control Fig 3 showing the simplified schematic of configurable input

2005 MAPLD, Paper 240 JJ Wang 13 Failure Mechanism For testing the programmable switch, node X is holding high by a single weak pull-up for TTL configuration Radiation induced leakage in the NMOS pull-down device pulls node X down (after certain total dose) and switches the input configuration from TTL (trip point ~1.5V) to CMOS (trip point ~2.5V) PAD To core logic V ref Weak pull up Radiation-induced leakage Node X Test Control Programmable Switch

2005 MAPLD, Paper 240 JJ Wang 14 Physical Mechanism The charge generation, transport and trapping in a biased oxide layer. The primary effect in sub-micron device is the hole trapping near the Si/SiO 2 interface.

2005 MAPLD, Paper 240 JJ Wang 15 Physical Mechanism

2005 MAPLD, Paper 240 JJ Wang 16 Physical Mechanism Total dose induced edge and field leakage

2005 MAPLD, Paper 240 JJ Wang 17 Lesson Learned and TID Hardening Accelerated testing overestimates the effects caused by radiation-induced field leakages Commercial foundries have variable FOX characteristics Weak pull-up is a weak spot for total dose effect Commercial design often is not perfectly radiation optimized due to time to market pressure Two design options 1.Redesign the logic so there is no weak pull-up 2.Re-layout the leaky NMOSFET to “edgeless” (shown below) Drain Gate Source