Final Exam Review Wade Fife ECEn/CS 224 August 13, 2007 August 13, 2007

2 Loose Ends Check your grades onlineCheck your grades online Weighting of grades and breakdown found on syllabusWeighting of grades and breakdown found on syllabus –A curve will be applied if needed Labs 9-12 should be graded by end of weekLabs 9-12 should be graded by end of week Estimate your missing scores and you should be able to calculate your gradeEstimate your missing scores and you should be able to calculate your grade

3 Exam Summary Do NOT write on exam!Do NOT write on exam! –Bring scratch paper –Throw it away before leaving the testing center 50 Questions50 Questions –1-17: True/False, 1 point each –18-25: Multiple choice, 1 point each –26-50: Multiple choice, 3 points each 4 hour time limit4 hour time limit Some reference material providedSome reference material provided Wednesday and Thursday in the Testing CenterWednesday and Thursday in the Testing Center –8:00 am to 8:00 pm (tests collected at 9:00 pm)

4 Study Tips Review topics onlineReview topics online Previous semesters’ review slides onlinePrevious semesters’ review slides online Midterm exam study questionsMidterm exam study questions Homework solutions onlineHomework solutions online Come see me to go over past tests, ask questionsCome see me to go over past tests, ask questions –Wednesday, 8:00 am to 5:00 pm –Other times by appointment ( me first) –Room 435 CB

5 New for the Final Exam Equivalent gatesEquivalent gates –An application of DeMorgan’s laws, truth tables Excitation tablesExcitation tables Flip flops with control inputsFlip flops with control inputs FET operations and gates built from FETsFET operations and gates built from FETs Need to have FF behavior memorized (D, T, JK)Need to have FF behavior memorized (D, T, JK) Possibly others…Possibly others…

6 Quick Review FPGAsFPGAs ROMsROMs Mealy vs. MooreMealy vs. Moore State encoding impact on circuitsState encoding impact on circuits LC-3LC-3 VerilogVerilog Bit order in questions and answersBit order in questions and answers –Q 3 Q 2 Q 1 Q 0 is different from Q 0 Q 1 Q 2 Q 3 –Pay attention to the notation used!

7 K-maps Give the minimum SOP expression for the function F(A,B,C,D,E) =  m(2,5,7,12,13,14,15,16,17,18,22,23,24,25,26,28,29,30,31)Give the minimum SOP expression for the function F(A,B,C,D,E) =  m(2,5,7,12,13,14,15,16,17,18,22,23,24,25,26,28,29,30,31) DE BC A = 0 DEBC A = 1

8 K-maps Give the minimum SOP expression for the function F(A,B,C,D,E) =  m(2,5,7,12,13,14,15,16,17,18,22,23,24,25,26,28,29,30,31)Give the minimum SOP expression for the function F(A,B,C,D,E) =  m(2,5,7,12,13,14,15,16,17,18,22,23,24,25,26,28,29,30,31) DE BC A = 0 DEBC A = 1

9 K-maps Give the minimum SOP expression for the functionGive the minimum SOP expression for the function DE BC A = 0 DEBC A = 1

10 K-maps Give the minimum SOP expression for the functionGive the minimum SOP expression for the function DE BC A = 0 DEBC A = 1 F = BC + A’CE + B’C’DE’ + AC’D’ + … Essential Prime Implicants

11 K-maps Give the minimum SOP expression for the functionGive the minimum SOP expression for the function DE BC A = 0 DEBC A = 1 F = BC + A’CE + B’C’DE’ + AC’D’ + … Essential Prime Implicants

12 K-maps Give the minimum SOP expression for the functionGive the minimum SOP expression for the function DE BC A = 0 DEBC A = 1 F = BC + A’CE + B’C’DE’ + AC’D’ + ACD + … Essential Prime Implicants

13 K-maps Give the minimum SOP expression for the functionGive the minimum SOP expression for the function DE BC A = 0 DEBC A = 1 F = BC + A’CE + B’C’DE’ + AC’D’ + ACD + ADE’ Essential Prime Implicants

14 K-maps Give the minimum SOP expression for the functionGive the minimum SOP expression for the function DE BC A = 0 DEBC A = 1 F = BC + A’CE + B’C’DE’ + AC’D’ + ACD + ADE’ … + ACD + AC’E’ Essential Prime Implicants

15 K-maps Give the minimum SOP expression for the functionGive the minimum SOP expression for the function DE BC A = 0 DEBC A = 1 F = BC + A’CE + B’C’DE’ + AC’D’ + ACD + ADE’ … + ACD + AC’E’ … + ACD + ABE’ Essential Prime Implicants

16 K-maps Give the minimum SOP expression for the functionGive the minimum SOP expression for the function DE BC A = 0 DEBC A = 1 F = BC + A’CE + B’C’DE’ + AC’D’ + ACD + ADE’ … + ACD + AC’E’ … + ACD + ABE’ … + CDE + … Essential Prime Implicants

17 K-maps Give the minimum SOP expression for the functionGive the minimum SOP expression for the function DE BC A = 0 DEBC A = 1 Essential Prime Implicants F = BC + A’CE + B’C’DE’ + AC’D’ + ACD + ADE’ … + ACD + AC’E’ … + ACD + ABE’ … + CDE + ADE’

18 K-maps Essential prime implicants ARE also prime implicantsEssential prime implicants ARE also prime implicants Many prime implicants may not be used in the final solutionMany prime implicants may not be used in the final solution

19 K-maps Non-essential prime implicants (some unused)Non-essential prime implicants (some unused) DE BC A = 0 DEBC A = 1 F = BC + A’CE + B’C’DE’ + AC’D’ + ACD + ADE’ … + ACD + AC’E’ … + ACD + ABE’ … + CDE + ADE’

20 K-maps Give the minimum POS expression for the functionGive the minimum POS expression for the function DE BC A = 0 DEBC A = 1

21 K-maps Give the minimum POS expression for the functionGive the minimum POS expression for the function DE BC A = 0 DEBC A = 1

22 K-maps Give the minimum POS expression for the functionGive the minimum POS expression for the function DE BC A = 0 DEBC A = 1 F’ = A’BC’ + C’DE + A’C’D’ + A’B’CE’ + AB’CD’ (all are essential) F = (A’BC’ + C’DE + A’C’D’ + A’B’CE’ + AB’CD’)’ F = (A+B’+C)(C+D’+E’)(A+C+D)(A+B+C’+E)(A’+B+C’+D), by DeMorgan’s

23 Timing Diagrams A B=1 C=1 D G A D 5ns 20ns30ns 32ns TypeDelay AND2 3 ns OR2 4 ns G

24 Timing Diagrams A B=1 C=1 D G F E A D E F G 5ns 8ns 12ns 20ns 23ns 30ns 33ns 27ns37ns 35ns 32ns 39ns TypeDelay AND2 3 ns OR2 4 ns

25 Transistor Level Schematics What is it? abcout Assume positive logic

26 Transistor Level Schematics What is it? abcout out = a’ + b’c’ Assume positive logic

27 Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d(4,8,14) Implementing Logic with Muxes 4-to-1 MUX Z A C I0I1I2I3I0I1I2I3

28 Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d(4,8,14) 4-to-1 MUX Z A C I0I1I2I3I0I1I2I3 B D’ 1 F = A’B’CD = (0)’B’(1)D = B’D Implementing Logic with Muxes