FRONT END PROCESSES - CLEANING, LITHOGRAPHY, OXIDATION ION IMPLANTATION, DIFFUSION, DEPOSITION AND ETCHING Cleaning belongs to front end processes and.

Slides:



Advertisements
Similar presentations
FABRICATION PROCESSES
Advertisements

Chapter 9. PN-junction diodes: Applications
School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland Course Tutor Dr R E Hurley Northern Ireland Semiconductor Research.
ECE G201: Introductory Material Goal: to give you a quick, intuitive concept of how semiconductors, diodes, BJTs and MOSFETs work –as a review of electronics.
Dispersive property of a G-M tube HV - + In the proportional region a G-M tube has dispersive properties tube voltage.
Chapter 4 Clean room, wafer cleaning and gettering
Chapter 2 Modern CMOS technology
ECE/ChE 4752: Microelectronics Processing Laboratory
INTEGRATED CIRCUITS Dr. Esam Yosry Lec. #6.
SOGANG UNIVERSITY SOGANG UNIVERSITY. SEMICONDUCTOR DEVICE LAB. Introduction SD Lab. SOGANG Univ. Gil Yong Song.
ISSUES TO ADDRESS... How are electrical conductance and resistance characterized ? 1 What are the physical phenomena that distinguish conductors, semiconductors,
Chapter 7b Fabrication of Solar Cell. Different kind of methods for growth of silicon crystal.
Semiconductor Physics - 1Copyright © by John Wiley & Sons 2003 Review of Basic Semiconductor Physics.
CHAPTER 5 DEFECTS.
Section 12: Intro to Devices
Solid State Detectors-2
MSE-630 Dopant Diffusion Topics: Doping methods Resistivity and Resistivity/square Dopant Diffusion Calculations -Gaussian solutions -Error function solutions.
Radiation Detection and Measurement II IRAD 2731.
ECE685 Nanoelectronics – Semiconductor Devices Lecture given by Qiliang Li.
EE415 VLSI Design The Devices: Diode [Adapted from Rabaey’s Digital Integrated Circuits, ©2002, J. Rabaey et al.]
Chapter 8 Ion Implantation Instructor: Prof. Masoud Agah
ES 176/276 – Section # 2 – 09/19/2011 Brief Overview from Section #1 MEMS = MicroElectroMechanical Systems Micron-scale devices which transduce an environmental.
Defects & Impurities BW, Ch. 5 & YC, Ch 4 + my notes & research papers
Z. Feng VLSI Design 1.1 VLSI Design MOSFET Zhuo Feng.
Microfabrication Nathaniel J. C. Libatique, Ph.D.
ELECTRICAL PROPERTIES
Chapter 8 Ion Implantation
Semiconductor Device and Processing Technology
Fabrication of Active Matrix (STEM) Detectors
References Hans Kuzmany : Solid State Spectroscopy (Springer) Chap 5 S.M. Sze: Physics of semiconductor devices (Wiley) Chap 13 PHOTODETECTORS Detection.
1 Semiconductor Detectors  It may be that when this class is taught 10 years on, we may only study semiconductor detectors  In general, silicon provides.
INTEGRATED CIRCUITS Dr. Esam Yosry Lec. #2. Chip Fabrication  Silicon Ingots  Wafers  Chip Fabrication Steps (FEOL, BEOL)  Processing Categories 
PN Junction Section
Techniques for determination of deep level trap parameters in irradiated silicon detectors AUTHOR: Irena Dolenc ADVISOR: prof. dr. Vladimir Cindro.
Advanced Analytical Chemistry – CHM 6157® Y. CAIFlorida International University Updated on 9/28/2006Chapter 6Electron Spectroscopy Chapter 6 Electron.
Integrated Circuit Devices Professor Ali Javey Summer 2009 Fabrication Technology.
1. A clean single crystal silicon (Si) wafer which is doped n-type (ColumnV elements of the periodic table). MOS devices are typically fabricated on a,
Taklimat UniMAP Universiti Malaysia Perlis WAFER FABRICATION Hasnizah Aris, 2008 Lecture 2 Semiconductor Basic.
SEMINAR ON IC FABRICATION MD.ASLAM ADM NO:05-125,ETC/2008.
Models and Simulations
SILICON VLSI TECHNOLOGY Fundamentals, Practice and Modeling By Plummer, Deal & Griffin © 2000 by Prentice Hall Upper Saddle River NJ : Silicon VLSI Technology.
Chapter Intrinsic: -- case for pure Si -- # electrons = # holes (n = p) Extrinsic: -- electrical behavior is determined by presence of impurities.
Post Anneal Solid State Regrowth
ENE 311 Lecture 9.
Photodetection EDIT Internal photoelectric effect in Si Band gap (T=300K) = 1.12 eV (~1100 nm) More than 1 photoelectron can be created by light in silicon.
SILICON DETECTORS PART I Characteristics on semiconductors.
INTEGRATED CIRCUITS Dr. Esam Yosry Lec. #3. Diffusion  Introduction  Diffusion Process  Diffusion Mechanisms  Why Diffusion?  Diffusion Technology.
NANO 225 Micro/NanoFabrication Electron Microscopes 1.
NANO 225 Intro to Nano/Microfabrication
IC Processing. Initial Steps: Forming an active region Si 3 N 4 is etched away using an F-plasma: Si3dN4 + 12F → 3SiF 4 + 2N 2 Or removed in hot.
Center for Materials for Information Technology an NSF Materials Science and Engineering Center Substrate Preparation Techniques Lecture 7 G.J. Mankey.
Norhayati Soin 06 KEEE 4426 WEEK 3/2 20/01/2006 KEEE 4426 VLSI WEEK 4 CHAPTER 1 MOS Capacitors (PART 3) CHAPTER MOS Capacitance.
Fundamentals of Semiconductor Physics 万 歆 Zhejiang Institute of Modern Physics Fall 2006.
Many solids conduct electricity
Questions/Problems on SEM microcharacterization Explain why Field Emission Gun (FEG) SEM is preferred in SEM? How is a contrast generated in an SEM? What.
CMOS FABRICATION.
Thin Oxides The new frontier. Volume 43, No Special Issue on Ultrathin Oxides.
Deep Level Transient Spectroscopy study of 3D silicon Mahfuza Ahmed.
Issued: May 5, 2010 Due: May 12, 2010 (at the start of class) Suggested reading: Kasap, Chapter 5, Sections Problems: Stanford University MatSci.
CHAPTER 6: MOSFET & RELATED DEVICES CHAPTER 6: MOSFET & RELATED DEVICES Part 1.
Process integration 2: double sided processing, design rules, measurements
FRONT END PROCESSES - CLEANING, LITHOGRAPHY, OXIDATION
CMOS Fabrication CMOS transistors are fabricated on silicon wafer
Prof. Jang-Ung Park (박장웅)
EMT362: Microelectronic Fabrication
Parul Institute of Engineering & Technology
Chapter 8 Ion Implantation
Introduction to Materials Science and Engineering
Defects & Impurities BW, Ch. 5 & YC, Ch 4 + my notes & research papers
Presentation transcript:

FRONT END PROCESSES - CLEANING, LITHOGRAPHY, OXIDATION ION IMPLANTATION, DIFFUSION, DEPOSITION AND ETCHING Cleaning belongs to front end processes and is an important part of fabrication. Reference - ITRS Roadmap for Front End Processes (class website). Chapter 4

Semiconductor Manufacturing Clean Rooms, Wafer Cleaning and Gettering Importance of unwanted impurities increases with shrinking geometries of devices. 75% of the yield loss is due to defects caused by particles (1/2 of the min feature size) Crystal originated ( nm) particles (COP) ~1,000Å=void with SiO x -> affect GOI -> anneal in H 2 -> oxide decomposes and surface reconstructs! & oxide precipitates from deep depth in Si. Yield -> 90% at the end -> each step

Historical Development and Basic Concepts Contaminants and their role in devices (various elements, various films) Na +, Ka + X OX ~10nm Q M ≈ 6.5x10 11 cm -2,   V TN =0.1V (equivalent to 6.7*10 17 cm -3 or 10 ppm contaminations) !! !! Life time killers Poly-Si, silicides Particles cause defects QMQM

SEMICONDUCTOR MANUFACTURING - CLEAN ROOMS, WAFER CLEANING AND GETTERING Modern IC factories employ a three tiered approach to controlling unwanted impurities: 1. clean factories 2. wafer cleaning 3. gettering Contaminants may consist of particles, organic films (photoresist), heavy metals or alkali ions ITRS Front End processes - see class website Up till 2018

Dynamic Random Access Memory Leakage currents discharge the capacitor (mechanism SRH) refresh the charge storage (time ~ a few msec) Deep-level traps (Cu, Fe, Au etc.) Pile up at the surface where the devices are located. Lifetime must be > ~ 25 µsec Use gettering to keep N t  G ≈100µsec write, read V th ~10 7 cm/sec  ~ cm -2

Role of Surface Cleaning in Processing Oxide thickness [Å] Residual contaminants, layers affect kinetics of processes. Surface effects are very important (MORE) in scaled down devices

Level 1 Contamination Reduction: Clean Factories Air quality is measured by the “class” of the facility. (Photo courtesy of Stanford Nanofabrication Facility.) Factory environment is cleaned by: Hepa filters and recirculation for the air, “Bunny suits” for workers. Filtration of chemicals and gases. Manufacturing protocols.

Level 1 Contamination Reduction: Clean Factories Class 1-100,000 mean number of particles, greater than 0.5  m, in a foot of air Particles ---> people, machines, supplies suitsMaterial filtersChemicals, water (use DI) Small particles remain in air (long) coagulate  large ones precipitate quickly and deposit on surfaces by (small) Brownian motion and gravitational sedimentation (larger). Use local clean rooms from Ex. Class 100 -> 5 particles/cm,  >0.1 µm in 1hr.

Level 2 Contamination Reduction: Wafer Cleaning Front End Process Back End Oxygen plasma Organic strippers (do not attack metals) 5 H H 2 O 2 + NH 4 OH SC1 Oxidizes organic films Oxidizes Si and complexes metals 6H 2 O : H 2 O 2 : HCl SC2 Small content reduces Si etch (0.05%) Removes alkali ions & cations Al 3+, Fe 3+, Mg 3+ (insoluble in NH 4 OH - SC1) H 2 S0 4 +H 2 O 2 Oxygen plasma Ultrasonic and now megasonic cleaning for particulates removal (20-50 kHz) Good clean for high T stepsLow T - less critical DI water is necessary: H 2 O H + +OH - [H + ]=[OH - ]=6x cm -3 Diffusivity of:H + ≈9.3x10 -5 cm 2 s -1 -> µ H+ =qD/kT=3.59cm 2 V -1 s -1 of :OH - ≈5.3x10 -5 cm 2 s -1 -> µ OH- =qD/kT=2.04cm 2 V -1 s -1

Level 2 Contamination Reduction: Wafer Cleaning RCA clean is “standard process” used to remove organics, heavy metals and alkali ions. Ultrasonic agitation is used to dislodge particles. with all contaminants -> H passivation (or F!) NH 4 OH small -> reduce surface roughness Not removed by SC1 HF dip added to remove oxide

Level 3 Contamination Reduction: Gettering Gettering is used to remove metal ions and alkali ions from device active regions. For the alkali ions, gettering generally uses dielectric layers on the topside (PSG or barrier Si 3 N 4 layers). For metal ions, gettering generally uses traps on the wafer backside or in the wafer bulk. Backside = extrinsic gettering. Bulk = intrinsic gettering.

Gettering Concepts: contaminants freed  diffuse  become trapped Fast Diffusion of Various Impurities Metal contaminants will be trapped by dislocations and SF (decorate) and far away from ICs PSG (for alkali ions Na +, K + and metals) affects E fields (dipoles in PSG) and absorbs water leading to Al corrosion (negative effects) or Si 3 N 4 Closer to devices than to a backside layer -> high efficiency metals

Heavy metal gettering relies on: Metals diffusing very rapidly in silicon. Metals segregating to “trap” sites.

“Trap” sites can be created by SiO 2 precipitates (intrinsic gettering), or by backside damage (extrinsic gettering). In intrinsic gettering, CZ silicon is used and SiO 2 precipitates are formed in the wafer bulk through temperature cycling at the start of the process. SiO 2 precipitates (white dots) in bulk of wafer. Intrinsic Gettering Oxygen ~ cm -3 ; ppm O i >20ppm -> too much precipitation-> strength decreases and warpage increases O i no precipitation-> no gettering denuded zone = oxygen free; thickness several tens of µm µm in size Slow ramp 1-3 nm min size of nuclei, concentrations ≈ cm -3 >> D dopants but D 0 << D metals

Intrinsic Gettering Due to Oxide Precipitates Precipitates (size) high T Density of nucleation sites low T The largest & the most dense defects -> the most efficient gettering

Measurement Methods Clean factories = particle control. Detect concentrations < 10/wafer of particles smaller than 0.1 µm Unpatterened wafers (blank) Count particles in microscope Laser scanning systems -> maps of particles down to ≈ 0.2 µm Patterned wafers Optical system compares a die with a “known good reference” die (adjacent die, chip design - its appearance) Image processing identifies defects (SEM) Test structure (not in high volume manufacturing)

Test Structures Trapped charge Q T  V TH change Dielectric breakdown due to particles, metals etc. Water – measure water resistivity  Deionized Water  =18.5 M  H 2 O  H + + OH - Models relate type of defects (typical for processes) with yields

Monitoring the Wafer Cleaning Efficiency Concentrations of impurities determined by surface analysis Primary beam – e - good lateral resolution Detected beam – e – good depth resolution and surface sensitivity X-raypoor depth resolution and poor surface sensitivity ions (SIMS)excellent ions (RBS)good depth resolution, reasonable sensitivity (0.1 atomic%) works with SEMHe MeV O + or Cs + sputtering and mass analyses Excite Identify (unique atomic signature) Count concentrations emitted

Electrons in Analytical Methods Inelastic collisions with target electrons, which are then emitted from the solid Elastic collision of incoming electrons with atoms (reflected back) ~ the same energy as for the incoming electrons ~ 5 eV (as in SEM)

Analytical Techniques kicked out a core electron This scheme is for lighter elements (Z=33 as is crossover b/w Auger and X- Ray Several keV X-Ray Electron Spectroscopy Electron Microprobe If X-Ray is at the input: el. Emitted= X-ray Photoelectron Spectroscopy (XPS) X-ray emitted= X-ray Fluorescence (XRF) XPS usually more dominant for lighter elements, XRF for heavier Auger El. Spectroscopy The core electron energy levels Several keV

Monitoring of Gettering Through Device Properties and Dielectric p – n leakage, refresh time DRAM junction and dielectric breakdown,  of n-p-n Material properties :  G (>>  R ) in the bulk and on the surface Photoconductive Decay Measurements ∆n=g op  G Carriers are generated due to light Decrease resistivity Recombine emission capture

= = + Carrier Generation Lifetime Deep Depletion - Return to Inversion via Carrier Generation (measure  G ) and surface recombination (s) DL inversion Zerbst technique: if plotted vs. (C min /C)-1 s=f(N ST,  )  =Capture cross section

Lifetime Measurements: Open Circuit Voltage Decay Diode switched from ON V D when carriers recombine Measurements include surface and bulk recombination t=0 ≈0.7V off Use also DLTS: identifies traps (E t ) and concentrations Thermal or photoexcitation processes in voltage modulable space-charge region (Schottky Diode, p-n junction, MOS Capacitor) Measured: capacitance, currents or conductance for t  >4

Excess Carrier Concentrations Decays: minority carriers  x=  tL/t d Experiment to calculate the diffusion constant D p, (n) for minority carriers (  p n ) -> µ p, (n) oscilloscope screen Pulse v d -> µ diffusion Drift: v d =L/t d µ p =v d /E Drift&diffusion Mobility of minority carriers