Stability and Passivity of the Super Node Algorithm for EM modelling of ICs Maria Ugryumova Supervisor : Wil Schilders Technical University Eindhoven, The Netherlands CASA day, 13 November 2008

Outline 1. Motivation 2. Fasterix and EM simulation 3. System parameters 4. Super Node Algorithm 5. Numerical example 6. Passivity enforcement 7. Conclusions 1 From the original model to the reduced one Realization

Outline 1. Motivation 2. Fasterix and EM simulation 3. System parameters 4. Super Node Algorithm 5. Numerical example 6. Passivity enforcement 7. Conclusions 1 From the original model to the reduced one Realization

Motivation Solution EM tools Model Order Reduction increasing IC complexity smaller feature sizes higher frequencies multilayer structure electromagnetic effects 2 65 nm – 45 nm 1.06 GHz – 3.33 GHz 9 layers Intel CoreTM2 Processors transistors

Fasterix – layout simulation tool for EM modelling (NXP) properties of ICs Motivation program simulator PSTAR (NXP) radiated EM fields 3 Model Order Reduction: Super Node Algorithm

Motivating example Time response of the lowpass filter model (300 unknowns). Why is it unstable? What is the reason of instability? How can we avoid the instability? Key questions? 4 unstable

Outline 1. Motivation 2. Fasterix and EM simulation 3. System parameters 4. Super Node Algorithm 5. Numerical example 6. Passivity enforcement 7. Conclusions 5 From the original model to the reduced one Realization

How Fasterix works 6 Initial data (coordinates, pins, metal, max. frequency, etc.) Geometry preprocessor; [Du Cloux 1993], [Wachters, Schilders 1997] 1.2.

How Fasterix works 7 Initial data (coordinates, pins, metal, max. frequency, etc.) Geometry preprocessor; BVP Full RLC circuit – inefficient! 3. [Du Cloux 1993], [Wachters, Schilders 1997]

Initial data (coordinates, pins, metal, max. frequency, etc.) Geometry preprocessor; BVP Full RLC circuit – inefficient! Super nodes are defined Reduced RLC circuit - efficient! How Fasterix works Super node algorithm [Du Cloux 1993], [Wachters, Schilders 1997]

Outline 1. Motivation 2. Fasterix and EM simulation 3. System parameters 4. Super Node Algorithm 5. Passivity enforcement 6. Numerical examples 7. Conclusions 9 From the original model to the reduced one Realization

System parameters Transfer function – residuals – poles Poles are for which or i.e. poles are eigenvalues of 10 Linear time invariant system

11 System parameters Passive positive real: H(s) is analytic for Re(s)>0 Passive systems dissipate power delivered through input and output ports synthesizable with positive R,L,C and transformers [Brune ‘31] Stable

Outline 1. Motivation 2. Fasterix and EM simulation 3. System parameters 4. Super Node Algorithm 5. Numerical example 6. Passivity enforcement 7. Conclusions 12 From the original model to the reduced one Realization

I - current in the branches V – voltage in the nodes J – currents, floating into the sys. through the nodes G – positive real, C – positive definite Voltage to current transfer: Admittance matrix Kirchhoff equations SNA: original (non-reduced) RLC model Y(s) is stable and positive real given unknown 13

SNA: Model Order Reduction Super Node Algorithm (SNA) 1. Elimination of non-super nodes: 2. Two steps of approximations 3. Realization of the circuit 14 Generated by BEM port 1 port 2 port 1 port 2

1. SNA: Elimination of non-super nodes Kirchhoff equations Partitioning R, L, C – positive definite N – super nodes N’ – all other nodes 15

Kirchhoff equations Partitioning Substitution into (1) R, L, C – positive definite N – super nodes N’ – all other nodes SNA: Elimination of non-super nodes

Kirchhoff equations Partitioning Substitution into (1) - Schur complement of stable: eig(-G,C)<0 positive real R, L, C – positive definite N – super nodes N’ – all other nodes SNA: Elimination of non-super nodes G – positive real, C – positive definite

Sketch of the proof: - positive real 1. Stable: 4. Lemma If is positive definite matrix then its Schur complements are positive definite. 5. By Lemma, positive definite positive real 2. - Schur complement of 3. Y(s) – positive definite: 17

2. SNA: Model Order Reduction Super Node Algorithm (SNA) 1. Elimination of non-super nodes: 2. Two steps of approximations 3. Realization of the circuit 18 Generated by BEM port 1 port 2 port 1 port 2

Under the assumption:, - free-space wave number. Pairs found from two systems: 2. SNA: 1st approximation: If then 19

stable not positive real computation of eigenvalues Introducing the null space for, we solve: 2. SNA: 2nd approximation: (details) 20 high freq. range Yc – indefinite! In the pole-residual form:

SNA: Comparison of the approximations All approximations match well Capacitances start influence at high frequencies GHz

Outline 1. Motivation 2. Fasterix and EM simulation 3. System parameters 4. Super Node Algorithm 5. Passivity enforcement 6. Numerical examples 7. Conclusions 22 From the original model to the reduced one Realization

SNA: Model Order Reduction (MOR) Super Node Algorithm (SNA) 1. Elimination of non-super nodes: 2. Two steps of approximations Generated by BEM

Calculate m<<n eigenvalues Choose (m+1) match frequencies Solve for Circuit elements RLC circuit realization SNA: Realization of the reduced circuit stable not positive real

N – number of super nodes m – number of branches between each pair of s.n. 3. SNA: Realization of the reduced circuit 25 RLC circuit realization stable not positive real [Guillemin’68]

What is the reason of instability in time domain? Key question? 26

3. SNA: Realization of the reduced circuit MNA: dimension of the system ) Redundancy 27 RLC circuit realization stable not positive real N – number of super nodes m – number of branches between each pair of s.n.

1.0e MNA: finite poles: Generalized eigenvalues: Match frequencies (Fasterix): Example (Two parallel striplines, 1MHz) sk(1)=0 sk(2)= sk(3)= e+07 sk(4)= e+07 sk(5)= e+07 dim(G,C) 85 x 85 stable not stable 28 RHP How to guarantee that reduced circuit will be described by the same poles?

Theorem Super node reduced circuit described by Y(s) with n stable poles, in MNA formulation has exactly the same n poles iff all ports: grounded / voltage / current sources [proof in progress] Two-ports realization port 1 port 2 29

Outline 1. Motivation 2. Fasterix and EM simulation 3. System parameters 4. Super Node Algorithm 5. Numerical example 6. Passivity enforcement 7. Conclusions 30 From the original model to the reduced one Realization

Example (Lowpass filter, 10e9 Hz) systemDim sys.RLCMutual.Ind.Time, sec. original reduced (m=4)

Outline 1. Motivation 2. Fasterix and EM simulation 3. System parameters 4. Super Node Algorithm 5. Numerical example 6. Passivity enforcement 7. Conclusions 32 From the original model to the reduced one Realization

Passivity enforcement pos. definite pos. real not positive real remedy: Modal approximation [Rommes, 2007] 33 pos. real Not pos. definite 2.) 1.)

Outline 1. Motivation 2. Fasterix and EM simulation 3. System parameters 4. Super Node Algorithm 5. Numerical examples 6. Passivity enforcement 7. Conclusions 34 From the original model to the reduced one Realization

Conclusions Achieved The reason of instability of SNA models has been found Remedy to guarantee stability has been presented Passivity enforcement Main hurdles Redundancy of the poles For N super nodes, m poles circuit elements Positive R,L,C not guaranteed Future work Another approach for simulation of EM effects based on measurement of Y/Z/S parameters 35

Thank you!

References Schilders, W.H.A. and ter Maten, E.J.W, Special volume : numerical methods in electromagnetics, Elsevier, Amsterdam, Cloux, R.Du and Maas, G.P.J.F.M and Wachters, A.J.H and Milsom, R.F. and Scott, K.J., Fasterix, an environment for PCB simulation, Proc. 11th Int. Conf. on EMC, Zurich, Switzeland, 1993 Rommes J., Methods for eigenvalue problems with applications in model order reduction, Ph.D. dissertation, Utrecht University, Utrecht, The Netherlands, [Online]. Available: Guillemin, E.A., Synthesis of Passive Networks, Wiley, New York, 1957