Library of Efficient Data types and Algorithms (LEDA)

Outline Introduction to LEDA -Basic data type -Graphs -GraphWin Resources of LEDA

LEDA Overview C++ class library for efficient data types and algorithms -Graph and network problems, geometric computations, combinatorial optimization Graphs Embedded Graphs Graph Algorithms Advance Data Types Basic Data Types GraphWin Windows Geometry Kernels Geometry Algorithms Numbers Ref: "LEDA A Platform for Combinatorial and Geometric Computing" CH.0 P.14 Fig.A

Basic Data Type String Tuple #include int main() { leda::string a="thomas"; leda::string b="christian"; leda::string c="thomas"; if (a==c) std::cout << "a==c\n"; //strings can be compared with == std::cout << b(0,4) << std::endl; //outputs the first five letters of b return 0; } #include using namespace leda; int main() { three_tuple triple(17,"triple",3.1413); std::cout << triple << std::endl; return 0; }

Container Array Dictionary Array leda::array A(1,100); int i; for (i=A.low(); i<=A.high(); i++) A[i]=i; std::cout << A[73] << " " << A[99] << std::endl; d_array D; //objects of type string, keys of type string D["hello"]="hallo"; D["world"]="Welt"; D["book"]="Buch"; string s; forall_defined(s,D) std::cout << s << " " << D[s] << std::endl;

GraphWin The GraphWin combines Graphs and Windows Applications -An Interactive GUI -Construct and display graphs -Visualize graphs and the results of graph algorithms

Create a GraphWin GRAPH G; GraphWin gw; //initial the graph random_simple_undirected_graph(G, 4, 3); Make_Connected(G); //set graphwin gw.set_graph(G); gw.set_edge_direction(undirected_edge); //show graphwin gw.display(window::center,window::center); gw.edit();

Graph Elements in a Graph -Node set -Edge set Node Edge

Graph Representation

Graph Data Structure Node -Node name -Neighbor -Serial number -Weight Edge -Edge name -Serial number -Weight -Source -Sink class NODE{ string name; vector neighbor; int sn; int weight; }; class EDGE { string name; int sn; int weight; NODE source; NODE sink; };

Basic Graph Operation Insert a node Delete a node Insert an edge Delete an edge

Graphs GRAPH G; node n_temp1, n_temp2, n_temp3, n_temp4, n_temp5; n_temp1 = G.new_node(“A”); n_temp2 = G.new_node(“B”); n_temp3 = G.new_node(“C”); n_temp4 = G.new_node(“D”); n_temp5 = G.new_node(“E”); G.new_edge(n_temp1, n_temp2); G.new_edge(n_temp2, n_temp3); G.new_edge(n_temp3, n_temp4); G.new_edge(n_temp3, n_temp5); A B C D E

Graph Traversal Example Depth-First Search Bread-First Search 046132504613 0124365012436

Example Code Graph construction DFS BFS

Graph Traversal Visualization BFS DFS

Min Cut Example The minimum cut has value: 3 cut:[3][1]

Example Code Graph construction Min cut algorithm

Outline Introduction to LEDA -Basic data type -Graphs -GraphWin Resources of LEDA

Resource of LEDA LEDA Office Page - LEDA User Manual - LEDA Guide - The LEDA Platform of Combinatorial and Geometric Computing -

Compilation on Workstation In NTHU-CAD -g++ -c –g -I/users/student/yourid/LEDA_lib/LEDA/incl -c -o test.o test.cpp -g++ -o test test.o -L/users/student//yourid/LEDA_lib/LEDA -lG -lL -lm; g++ parameters --I: location of the LEDA header files --L: location the LEDA library files

Appendix

Final Project (FPGA Technology Mapping) Logic description Decomposition process Technology mapping A mapped logic description ( a general graph) Minimize the number of required Boolean operations from primary input to primary output Use K-input LUTs to cover networks for timing optimal

Two-input Decomposition Decompose multi-input operation to two-input operation Minimize the number of operation from inputs to outputs

Decomposed Network (1) The level of the decomposed network is 4

Decomposed Network (2) The level of the decomposed network is 5

Technology Mapping in FPGA Logic function is composed of LUT Minimize the level and number of LUT a b c d e v FvFv 3-feasible cone C v PIs Delay of 2

Inputs & Outputs

Overall Flow Two-input Decomposition FPGA technology mapping Your algorithm

Notice Both the number of LUT and the height of the circuit are scored -the level of LUT is the main consideration -the number of LUT minimization is optional The Boolean functionality of your mapped circuit must be equivalent to that of original circuit. -SIS command (eq. verify) You can download the static library file of LEDA from course web site and use the graph algorithm provided by LEDA API in your code. -

Most Important … Please follow the format of run-time example. -map –k 4 map01.blif output.blif TA will test your program with different K-input size

Due Day 1/14 (Tue) 2014 Come to TA office (R227 EECS building) and demo your program & report