Design methodology.

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Presentation transcript:

Design methodology

Design Methodology Specification Trade-off’s Design domains - abstraction level Top-down - Bottom up Schematic based Synthesis based Getting it right - Simulation Lower power

Specification A specification of what to construct is the first major step. A detailed specification must be agreed upon with the system people. Major changes during design will result in significant delays. Requirements must be considered at many levels System Board Hybrid IC Specifications can be verified by system simulations. Specification is 1/4 - 1/3 of total IC project !.

Trade offs Integration Tools Technology Packaging Time Schedule Flexibility Partitioning Testing Availability Man power Reliability Speed Development costs Chip size Production costs Power

Design domains Gajski chart Structural Behavioral Geometric Processor, memory Program ALU, registers State machine Cell Module Device, gate Boolean equation Transistor Transfer function Masks Gate Functional unit Macro IC Geometric

Design domains and synthesis Architectural level Logic level Circuit level State For I=0 to I=15 Sum = Sum + array[I] Behavioral level Architecture synthesis Logic synthesis Circuit synthesis Control Memory Structural level + Clk

Top - down design Choice of algorithm (optimization) Choice of architecture (optimization) Definition of functional modules Definition of design hierarchy Split up in small boxes - split up in small boxes - split up in small boxes Define required units ( adders, state machine, etc.) Floor-planning Map into chosen technology (synthesis, schematic, layout) (change algorithms or architecture if speed or chip size problems) Behavioral simulation tools

CMOS Design Flow

RTL Synthesis Flow

Standard Cell Place and Rout Design Flow

Bottom - up Build gates in given technology Build basic units using gates Build generic modules of use Put modules together Hope that you arrived at some reasonable architecture Gate level simulation tools Comment by one of the main designers of the Pentium processor The design was made in a typical top - down , bottom - up , inside - out design methodology

Schematic based Symbol of module defines interface Schematic of module defines function Top - down: Make first symbol and then schematic Bottom - up: Make first Schematic and then symbol Logic module Basic gate Symbol Schematic

Synthesis based Define modules and their behavior in a proper language (also used for simulation) Use synthesis tools to generate schematics and symbols (netlists) always @(posedge clk) begin if (set) coarse <= #(test.ff_delay) offset; else if (coarse == count_roll_over) coarse <= #(test.ff_delay) 0; else coarse <= #(test.ff_delay) coarse + 1; end