Tema 2: Teoría básica de los convertidores CC/CC (I) Grupo de Sistemas Electrónicos de Alimentación (SEA) Universidad de Oviedo Área de Tecnología Electrónica Tema 2: Teoría básica de los convertidores CC/CC (I) (convertidores con un único transistor) SEA_uniovi_CC1_00

Introducing switching regulators Outline (I) Introducing switching regulators Basis of their analysis in steady state Detailed study of the basic DC/DC converters in continuous conduction mode Buck, Boost and Buck-Boost converters Common issues and different properties Introduction to the synchronous rectification Four-order converters SEA_uniovi_CC1_01

Study of the basic DC/DC converters in discontinuous conduction mode Outline (II) Study of the basic DC/DC converters in discontinuous conduction mode DC/DC converters with galvanic isolation How and where to place a transformer in a DC/DC converter The Forward and Flyback converters Introduction to converters with transformers and several transistors Control circuitry for DC/DC converters Building blocks in controllers Introduction to the dynamic modelling SEA_uniovi_CC1_02

Linear DC/DC conversion (analog circuitry) - Vref Av Feedback loop vE RL vg vO RV iO ig Actual implementation - Vref Av Feedback loop vE RL vg vO Q iO ig = (vOiO)/(vgig) iO  ig   vO/vg First idea Only a few components Robust No EMI generation Only lower output voltage Efficiency depends on input/output voltages Low efficiency Bulky SEA_uniovi_CC1_03

vO Linear versus switching DC/DC conversion vO_avg vg t - - Linear Vref Av Feedback loop vE RL vg vO Q iO ig - Vref Av Feedback loop vE RL vg vO S iO ig PWM Linear Switching (provisional) Features: 100% efficiency Undesirable output voltage waveform vO_avg vO vg t SEA_uniovi_CC1_04

The AC component must be removed!! Introducing the switching DC/DC conversion (I) - Vref Av Feedback loop vE RL vg vO S iO ig PWM vO vg t vO_avg The AC component must be removed!! - Vref Av Feedback loop vE RL vg vO S iO ig PWM Filter RL vg vO S iO ig C filter C filter VO Vg t Basic switching DC/DC converter (provisional) It doesn’t work!!! SEA_uniovi_CC1_05

vD Introducing the switching DC/DC conversion (II) VO Vg t LC filter - Vref Av Feedback loop vE RL vg vO S iO ig PWM Filter RL vg vO S iO ig LC filter iL C L LC filter Infinite voltage across L when S1 is opened It doesn’t work either!!! Including a diode RL vg vO S iO ig LC filter iL C L iD D vD + - vD Vg t VO Basic switching DC/DC converter SEA_uniovi_CC1_06

Introducing the switching DC/DC conversion (III) RL vg vO S iO ig iL C L iD D vD + - iS RL vg vO S iO ig LC filter iL C L iD D vD + - Buck converter Starting the analysis of the Buck converter in steady state: L & C designed for negligible output voltage ripple (we are designing a DC/DC converter) iL never reaches zero (Continuous Conduction Mode, CCM) The study of the Discontinuous Conduction Mode (DCM) will done later t iL CCM t iL DCM SEA_uniovi_CC1_07

The AC component is removed by the filter First analysis of the Buck converter in CCM (In steady-state) Analysis based on the specific topology of the Buck converter - RL vg vO S iO ig iL C L iD D vD + iS - RL vO iO iL C L vD + LC filter T dT t vD vO vg d: “duty cycle” vD vg t vD_avg = vO The AC component is removed by the filter This procedure is only valid for converter with explicit LC filter vO = vD_avg = d·vg SEA_uniovi_CC1_08

Introducing another analysis method (I) Could we use the aforementioned analysis in the case of this converter (SEPIC)? R Vg VO + - ig iS iD L1 C2 S D iL2 L2 C1 Obviously, there is not an explicit LC filter Therefore, we must use another method SEA_uniovi_CC1_09

Powerful tools to analyze DC/DC converters in steady-state Introducing another analysis method (II) Powerful tools to analyze DC/DC converters in steady-state Step 1- To obtain the main waveforms (with no quantity values) using Faraday’s law and Kirchhoff’s current and voltage laws Step 2- To take into account the average value of the voltage across inductors and of the current through capacitors in steady-state Step 2 (bis)- To use the volt·second balance Step 3- To apply Kirchhoff’s current and voltage laws in average values Step 4- Input-output power balance SEA_uniovi_CC1_10

Circuit in steady-state Introducing another analysis method (III) Any electrical circuit that operates in steady-state satisfies: The average voltage across an inductor is zero. Else, the net current through the inductor always increases and, therefore, steady-state is not achieved The average current through a capacitor is zero. Else, the net voltage across the capacitor always increases and, therefore, steady-state is not achieved Vg Circuit in steady-state L C + - vL_avg = 0 iC_avg = 0 SEA_uniovi_CC1_11

Circuit in steady-state Introducing another analysis method (IV) Particular case of many DC/DC converters in steady-state: Voltage across the inductors are rectangular waveforms Current through the capacitors are triangular waveforms T dT vL t - + v1 -v2 Same areas + - vL iC Vg Circuit in steady-state L C vL_avg = 0 iC_avg = 0 Volt·second balance: V1dT – V2(1-d)T = 0 t iC - + Same areas SEA_uniovi_CC1_12

Introducing another analysis method (V) Any electrical circuit of small dimensions (compared with the wavelength associated to the frequency variations) satisfies: Kirchhoff’s current law (KCL) is not only satisfied for instantaneous current values, but also for average current values Kirchhoff’s voltage law (KVL) is not only satisfied for instantaneous voltage values, but also for average voltage values KVL applied to Loop1 yields: vg - vL1 - vC1 - vL2 = 0 vg - vL1_avg - vC1_avg - vL2_avg = 0 Therefore: vC1_avg = vg KCL applied to Node1 yields: iL1 - iC1 - iS = 0 iL1_avg - iC1_avg - iS_avg = 0 Therefore: iS_avg = iL1_avg Vg iL1 iS L1 S L2 C1 + - iC1 vL1 vL2 vC1 Example Node1 Loop1 SEA_uniovi_CC1_13

Switching-mode DC/DC converter Introducing another analysis method (VI) A switching converter is (ideally) a lossless system Input power: Pg = vgig_avg RL vg vO iO ig + - Switching-mode DC/DC converter Output power: PO = vOiO = vO2/RL Power balance: Pg = PO Therefore: vgig_avg = vO2/RL A switching-mode DC/DC converter as an ideal DC transformer DC Transformer vg iO ig_avg RL vO + - 1:N being N = vO/vg ig_avg = iOvO/vg = N·iO Important concept!! SEA_uniovi_CC1_14

Steady-state analysis of the Buck converter in CCM (I) Step 1: Main waveforms. Remember that the output voltage remains constant during a switching cycle if the converter has been properly designed RL vg vO S iO ig iL C L iD D vD + - iS vS t iS iD iL Driving signal dT T iO iL RL vg vO C L + - During dT S on, D off iO iL RL vO C L + - During (1-d)T S off, D on SEA_uniovi_CC1_15

Steady-state analysis of the Buck converter in CCM (II) Step 1: Main waveforms (cont’) Driving signal t vL iL iL_avg vS iL + vL - iO + - dT vg-vO L + C + T - vO S vD vO vg RL - - D DiL S on, D off, dT iO iL RL vg vO C L + - vL S off, D on, (1-d)T iO iL RL vO C L + - vL From Faraday’s law: DiL = vO(1-d)T/L SEA_uniovi_CC1_16

Steady-state analysis of the Buck converter in CCM (III) Step 2 and 2 (bis): Average inductor voltage and capacitor current Average value of iC: iC_avg = 0 RL vO iO iL C L + - vL iC Node1 vg S ig iD D iS Volt·second balance: (vg - vO)dT - vO(1-d)T = 0 Therefore: vO = d·vg (always vO < vg) dT vg-vO T - vO Driving signal t vL iL iL_avg Step 3: Average KCL and KVL: KCL applied to Node1 yields: iL - iC - iO = 0 iL_avg - iC_avg - iO = 0 Therefore: iL_avg = iO = vO/RL + - Step 4: Power balance: ig_avg = iS_avg = iOvO/vg = d·iO SEA_uniovi_CC1_17

Steady-state analysis of the Buck converter in CCM (IV) RL vg vO S iO ig iL C L iD D vD + - iS vS Summary iO t iS iD iL dT T DiL Driving signal vD vg vO = d·vg (always vO < vg) vSmax = vDmax = vg iL_avg = iO = vo/RL ig_avg = iS_avg = d·iO iD_avg = iL_avg - iS_avg = (1-d)·iO DiL = vO(1-d)T/L iL_peak = iL_avg + DiL/2 = iO + vO(1-d)T/(2L) iS_peak = iD_peak = iL_peak SEA_uniovi_CC1_18

Steady-state analysis of the Boost converter in CCM (I) Can we obtain vO > vg? Þ Boost converter Step 1: Main waveforms + - C vg iL iS L S iD D RL vO iO vL ig t iS iD iL Driving signal dT T DiL S on, D off, during dT iL vg L vL + - S off, D on, during (1-d)T iO iL RL vO C L + - vL From Faraday’s law: DiL = vgdT/L SEA_uniovi_CC1_19

Steady-state analysis of the Boost converter in CCM (II) Step 2 and 2 (bis): Average values + - C vg iL iS L S iD D RL vO iO vL ig iC Node1 Average value of iC: iC_avg = 0 Volt·second balance: vgdT - (vO - vg)(1-d)T = 0 Therefore: vO = vg/(1-d) (always vO > vg) dT vg T Driving signal t vL iD iD_avg DiL -(vO-vg) Step 3: Average KCL and KVL: KCL applied to Node1 yields: iD - iC - iO = 0 iD_avg - iC_avg - iO = 0 Therefore: iD_avg = iL_avg(1-d) = iO = vO/RL Step 4: Power balance: ig_avg = iL_avg = iOvO/vg = iO/(1-d) SEA_uniovi_CC1_20

Steady-state analysis of the Boost converter in CCM (III) vS + - vD C vg iL iS L S iD D RL vO iO vL ig iC Summary iO t iS iD iL dT T DiL Driving signal vD vO vO = vg/(1-d) (always vO > vg) vSmax = vDmax = vO iL_avg = ig_avg = iO/(1-d) = vo/[RL(1-d)] iS_avg = d·iL_avg = d·vo/[RL(1-d)] iD_avg = iO DiL = vgdT/L iL_peak = iL_avg + DiL/2 = iL_avg + vgdT/(2L) iS_peak = iD_peak = iL_peak SEA_uniovi_CC1_21

Steady-state analysis of the Buck-Boost converter in CCM (I) Can we obtain either vO < vg or vO > vg Þ Buck-Boost converter + - C D vg iL iS L S iD RL iO vO ig vL t iS iD iL Driving signal dT T DiL S on, D off, during dT Charging stage iL vg L vL + - ig S off, D on, during (1-d)T iO RL vO C - + iL L vL Discharging stage From Faraday’s law: DiL = vgdT/L SEA_uniovi_CC1_22

Steady-state analysis of the Buck-Boost converter in CCM (II) Step 2 and 2 (bis): Average values Node1 + - C D vg iL iS L S iD RL iO vO ig vL iC Average value of iC: iC_avg = 0 Volt·second balance: vgdT - vO(1-d)T = 0 Therefore: vO = vgd/(1-d) dT vg T Driving signal t vL iD iD_avg DiL -vO Step 3: Average KCL and KVL: KCL applied to Node1 yields: iD - iC - iO = 0 iD_avg - iC_avg - iO = 0 Therefore: iD_avg = iL_avg(1-d) = iO = vO/RL Step 4: Power balance: ig_avg = iS_avg = iOvO/vg = iOd/(1-d) SEA_uniovi_CC1_23

Steady-state analysis of the Buck-Boost converter in CCM (III) Summary + - C D vg iL iS L S iD RL iO vO ig vL vD vS iO t iS iD iL dT T DiL Driving signal vD vO + vg vO = vgd/(1-d) (both vO < vg and vO > vg) vSmax = vDmax = vO + vg iD_avg = iO DiL = vgdT/L iL_avg = iD_avg/(1-d) = iO/(1-d) = vo/[RL(1-d)] iS_avg = ig_avg = d·iL_avg = d·vo/[RL(1-d)] iL_peak = iL_avg + DiL/2 = iL_avg + vgdT/(2L) iS_peak = iD_peak = iL_peak SEA_uniovi_CC1_24

Complementary switches + inductor Common issues in basic DC/DC converters (I) RL vg vO S C L D + - Buck Complementary switches + inductor vg RL vO + - C L D S d 1-d + - C vg L S D RL vO Boost Voltage source + - C D vg L S RL vO Buck-Boost The inductor is a energy buffer to connect two voltage sources SEA_uniovi_CC1_25

Common issues in basic DC/DC converters (II) Diode turn-off We start when the diode is on RL vg vO S C L D + - Buck The diode turns off when the transistor turns on The diode reverse recovery time is of primary concern evaluating switching losses Schottky diodes are desired from this point of view In the range of line voltages, SiC diodes are very appreciated Boost converter is word-wide used as a part of the modern off-line power supplies (Power Factor Corrector, PFC) + - C vg L S D RL vO Boost + - C D vg L S RL vO Buck-Boost vO + vg SEA_uniovi_CC1_26

(both vO < vg and vO > vg) Comparing basic DC/DC converters (I) Generalized study as DC transformer (I) RL vg vO S iO ig C L D + - Buck DC Transformer vg iO ig_avg RL vO + - 1:N + - C vg L S D RL vO iO ig Boost Buck: N= d (only vO < vg) Boost: N= 1/(1-d) (only vO > vg) Buck-Boost: N= -d/(1-d) (both vO < vg and vO > vg) + - C D vg L S RL iO vO ig Buck-Boost SEA_uniovi_CC1_27

Comparing basic DC/DC converters (II) Generalized study as DC transformer (II) DC Transformer vg iO ig_avg RL vO + - 1:N ig_avg = iON = iOd/(1-d) Buck: ig_avg = iON = iOd Boost: ig_avg = iON = iO/(1-d) Buck-Boost: ig_avg = iON = - iOd/(1-d) SEA_uniovi_CC1_28

Comparing basic DC/DC converters (III) Electrical stress on components (I) vg ig iD D vD + - S iS vS RL vO iO DC/DC converter Buck: vSmax = vDmax = vg iS_avg = ig_avg iL_avg = iO iD_avg = iL_avg - iS_avg Boost: vSmax = vDmax = vO iL_avg = ig_avg iD_avg = iO iS_avg = iL_avg - iD_avg Buck-Boost: vSmax = vDmax = vO + vg iS_avg = ig_avg iD_avg = iO iL_avg = iS_avg + iD_avg SEA_uniovi_CC1_29

Comparing basic DC/DC converters (IV) Example of electrical stress on components (I) RL S C L D + - 50 V 100 V 2 A 1 A (avg) 100 W Buck, 100% efficiency vS_max = vD_max = 100 V iS_avg = iD_avg = 1 A iL_avg = 2 A FOMVA_S = FOMVA_D = 100 VA + - C D L S RL 50 V 100 V 2 A 1 A (avg) 100 W Buck-Boost, 100% efficiency vS_max = vD_max = 150 V iS_avg = 1 A iD_avg = 2 A iL_avg = 3 A FOMVA_S = 150 VA FOMVA_D = 300 VA Higher electrical stress in the case of Buck-Boost converter Therefore, lower actual efficiency SEA_uniovi_CC1_30

Comparing basic DC/DC converters (V) Example of electrical stress on components (II) + - C L S D RL 50 V 25 V 2 A 4 A (avg) 100 W Boost, 100% efficiency vS_max = vD_max = 50 V iS_avg = iD_avg = 2 A iL_avg = 4 A FOMVA_S = FOMVA_D = 100 VA + - C D L S RL 50 V 25 V 2 A 4 A (avg) 100 W Buck-Boost, 100% efficiency vS_max = vD_max = 75 V iS_avg = 4 A iD_avg = 2 A iL_avg = 6 A FOMVA_S = 300 VA FOMVA_D = 150 VA Higher electrical stress in the case of Buck-Boost converter Therefore, lower actual efficiency SEA_uniovi_CC1_31

Comparing basic DC/DC converters (VI) Price to pay for simultaneous step-down and step-up capability: Higher electrical stress on components and, therefore, lower actual efficiency Converters with limited either step-down or step-up capability: Lower electrical stress on components and, therefore, higher actual efficiency SEA_uniovi_CC1_32

Comparing basic DC/DC converters (VII) Example of power conversion between similar voltage levels based on a Boost converter 300 W Boost, 98% efficiency + - C L S D RL 60 V 50 V 5 A 6.12 A (avg) 1.12 A (avg) vS_max = vD_max = 60 V iS_avg = 1.12 A iD_avg = 5 A iL_avg = 6.12 A FOMVA_S = 67.2 VA FOMVA_D = 300 VA Very high efficiency can be achieved!!! SEA_uniovi_CC1_33

Comparing basic DC/DC converters (VIII) The opposite case: Example of power conversion between very different and variable voltage levels based on a Buck-Boost converter 300 W Buck-Boost, 75% efficiency + - C D L S RL 60 V 20 - 200 V 5 A 20 - 2 A (avg) vS_max = vD_max = 260 V iS_avg_max = 20 A iD_avg_max = 5 A iL_avg = 25 A FOMVA_S_max = 5200 VA FOMVA_D = 1300 VA Remember previous example: FOMVA_S = 67.2 VA FOMVA_D = 300 VA High efficiency cannot be achieved!!! SEA_uniovi_CC1_34

One disadvantage exhibited by the Boost converter: Comparing basic DC/DC converters (IX) One disadvantage exhibited by the Boost converter: The input current has a “direct path” from the input voltage source to the load. No switch is placed in this path. As a consequence, two problems arise: Large peak input current in start-up No over current or short-circuit protection can be easily implemented (additional switch needed) + - C vg L S D RL vO Boost Buck and Buck-Boost do not exhibit these problems SEA_uniovi_CC1_35

Synchronous rectification (I) To use controlled transistors (MOSFETs) instead of diodes to achieve high efficiency in low output-voltage applications This is due to the fact that the voltage drop across the device can be lower if a transistor is used instead a diode The conduction takes place from source terminal to drain terminal In practice, the diode (Schottky) is not removed S L D idevice vdevice Diode MOSFET S1 L S2 S1 L S2 SEA_uniovi_CC1_36

Synchronous rectification (II) In converters without a transformer, the control circuitry must provide proper driving signals In converters with a transformer, the driving signals can be obtained from the transformer (self-driving synchronous rectification) Nowadays, very common technique with low output-voltage Buck converters RL vg vO C L + - Synchronous Buck S1 S2 D S1 L S2 Feedback loop - Vref Av vO PWM Q Q’ SEA_uniovi_CC1_37

Input current and current injected into the output RC cell (I) If a DC/DC converter were an ideal DC transformer, the input and output currents should also be DC currents As a consequence, no pulsating current is desired in the input and output ports and even in the current injected into the RC output cell vg ig iD D vD + - S iS vS RL vO DC/DC converter C iRC t Desired current ig t iRC Desired current SEA_uniovi_CC1_38

Input current and current injected into the output RC cell (II) ig Noisy RL vg vO S iRC C L D + - Buck Low noise + - C vg L S D RL vO Boost ig iRC Low noise t Noisy vO + - C D vg L S RL Buck-Boost ig iRC t Noisy SEA_uniovi_CC1_39

Input current and current injected into the output RC cell (III) Adding EMI filters RL vg vO S iRC ig C L D + - Buck CF LF Filter + - CF vg L S D Boost ig iRC RL vO C LF Filter iRC ig + - CF D L S Buck-Boost RL vO C LF vg Filter Filter SEA_uniovi_CC1_40

Four-order converters (converters with integrated filters) RL vg vO + - ig iS iD L1 C2 S D iL2 L2 C1 vC1 SEPIC Same vO/vg as Buck-Boost Same stress as Buck-Boost vC1 = vg Filtered input RL vg vO + - ig iS iD L1 C2 S D iL2 L2 C1 vC1 Cuk Same vO/vg as Buck-Boost Same stress as Buck-Boost vC1 = vg + vO Filtered input and output RL vg vO + - iS iD L1 C2 S D iL2 L2 C1 iL1 vC1 Zeta Same vO/vg as Buck-Boost Same stress as Buck-Boost vC1 = vO Filtered output SEA_uniovi_CC1_41

DC/DC converters operating in DCM (I) Only one inductor in basic DC/DC converters The current passing through the inductor decreases when the load current decreases (load resistance increases) vg ig D S RL vO iO + - DC/DC converter L iL T dT t iL Driving signal iL_avg Buck: iL_avg = iO Boost: iL_avg = iO/(1-d) Buck-Boost: iL_avg = iS_avg + iD_avg = diO/(1-d) + iO = iO/(1-d) SEA_uniovi_CC1_42

Boundary between CCM and DCM DC/DC converters operating in DCM (II) When the load decreases, the converter goes toward Discontinuous Conduction Mode (DCM) iL_avg t iL RL_1 Decreasing load Operation in CCM t iL RL_2 > RL_1 iL_avg iL t RL_crit > RL_2 iL_avg Boundary between CCM and DCM It corresponds to RL = R L_crit SEA_uniovi_CC1_43

DC/DC converters operating in DCM (III) What happens when the load decreases below the critical value? iL t RL_crit iL_avg Decreasing load DCM starts if a diode is used as rectifier If a synchronous rectifier (SR) is used, the operation depends on the driving signal CCM operation is possible with synchronous rectifier with a proper driving signal (synchronous rectifier with signal almost complementary to the main transistor) iL t RL_3 > RL_crit iL_avg CCM w. SR iL t RL_3 > RL_crit iL_avg DCM w. diode SEA_uniovi_CC1_44

DC/DC converters operating in DCM (IV) Remember: iL_avg = iO (Buck) or iL_avg = iO/(1-d) (Boost and Buck-Boost) iL t RL > RL_crit CCM w. SR iL_avg For a given duty cycle, lower average value (due to the negative area) Þ lower output current for a given load Þ lower output voltage iL t iL_avg RL > RL_crit DCM w. diode For a given duty cycle, higher average value (no negative area) Þ higher output current for a given load Þ higher output voltage The voltage conversion ratio vO/vg is always higher in DCM than in CCM (for a given load and duty cycle) SEA_uniovi_CC1_45

How can we get DCM (of course, with a diode as rectifier) ? DC/DC converters operating in DCM (V) How can we get DCM (of course, with a diode as rectifier) ? t iL After decreasing the inductor inductance After decreasing the switching frequency After decreasing the load (increasing the load resistance) SEA_uniovi_CC1_46

Three sub-circuits instead of two: DC/DC converters operating in DCM (VI) Three sub-circuits instead of two: t iL iL_avg vL T d·T d’·T + - iD iD_avg -vO vg Driving signal The transistor is on. During d·T The diode is on. During d’·T Both the transistor and the diode are off. During (1-d-d’)T Example: Buck-Boost converter + - C D vg iL iS L S iD RL iO vO ig vL iL vg L vL + - ig During d·T iO RL vO C - + iL L vL During d’·T iL L vL + - During (1-d-d’)T SEA_uniovi_CC1_47

Voltage conversion ratio vO/vg for the Buck-Boost converter in DCM DC/DC converters operating in DCM (VII) Voltage conversion ratio vO/vg for the Buck-Boost converter in DCM iL vg L vL + - ig During d·T t iL iL_avg vL T d·T d’·T + - iD iD_avg -vO vg Driving signal iL_max From Faraday’s law: vg = LiL_max/(dT) iO RL vO C - + iL L vL During d’·T And also: vO = LiL_max/(d’T) Also: iD_avg = iL_maxd’/2, iD_avg = vO/R And finally calling M = vO/vg we obtain: M =d/(k)1/2 where k =2L/(RT) SEA_uniovi_CC1_48

The Buck-Boost converter just on the boundary between DCM and CCM DC/DC converters operating in DCM (VIII) The Buck-Boost converter just on the boundary between DCM and CCM iL t RL = RL_crit iL_avg Due to being in DCM: M = vO/vg = d/(k)1/2, where: k = 2L/(RT) Due to being in CCM: N = vO/vg = d/(1-d) Just on the boundary: M = N, R = Rcrit, k = kcrit Therefore: kcrit = (1-d)2 The converter operates in CCM if: k > kcrit The converter operates in DCM if: k < kcrit SEA_uniovi_CC1_49

Summary for the basic DC/DC converter DC/DC converters operating in DCM (IX) Summary for the basic DC/DC converter N = d 2 M = 1 + 1 + 4k d2 kcrit = (1-d) kcrit_max = 1 Buck 2 M = 1 + 1 + 4d2 k 1 N = 1-d kcrit = d(1-d)2 kcrit_max = 4/27 Boost d M = k N = 1-d kcrit = (1-d)2 kcrit_max = 1 Buck-Boost k = 2L/(RT) SEA_uniovi_CC1_50

DC/DC converters operating in DCM (X) CCM versus DCM t iS iD iL dT T Driving signal vD iL_avg t iS iD iL dT T Driving signal vD iL_avg - Lower conduction losses in CCM (lower rms values) - Lower losses in DCM when S turns on and D turns off - Lower losses in CCM when S turns off - Lower inductance values in DCM (size?) SEA_uniovi_CC1_51

A two-winding magnetic device is needed Achieving galvanic isolation in DC/DC converters (I) A two-winding magnetic device is needed Parts and mounting procedure: - Bobbin - Windings - Magnetic core - Attaching the cores SEA_uniovi_CC1_52

Circuit in steady-state Achieving galvanic isolation in DC/DC converters (II) The volt·second balance in the case of magnetic devices with two windings vi = ni d/dt = B - A = (vi/ni)·dt B A From Faraday’s law: vg Circuit in steady-state n1:n2 v1 + - v2 In steady-state: ()in a period= 0 (vi /ni)avg = 0 And therefore: Volt·second balance: If all the voltages are DC voltages, then: CCM: dT(V1/n1) – (1-d)T(V2/n2) = 0 DCM: dT(V1/n1) –d’T(V2/n2) = 0 SEA_uniovi_CC1_53

Achieving galvanic isolation in DC/DC converters (III) Transformer models Model 1 n1:n2 Lm1 Ll1 Ll2 Model 3: Magnetic transformer with real coupling Model 2 n1:n2 Model 1: Circuit Theory element n1:n2 Lm1 Model 2: Magnetic transformer with perfect coupling At least the magnetizing inductance must be taken into account analyzing DC/DC converters SEA_uniovi_CC1_54

Where must we place the transformer? Achieving galvanic isolation in DC/DC converters (IV) Where must we place the transformer? n1:n2 Lm1 In a place where the average voltage is zero vg ig vD D + - vS S RL vO iO DC/DC converter SEA_uniovi_CC1_55

Achieving a Buck converter with galvanic isolation (I) No place with average voltage equal to zero RL vg vO S C L D + - Buck New node with zero average voltage RL vg vO S C L D + - S on S off RL vO C L D1 + - D2 vg S n1:n2 Lm1 It does not work!! SEA_uniovi_CC1_56

A circuit to a apply a given DC voltage across Lm1 when S is off Achieving a Buck converter with galvanic isolation (II) A circuit to a apply a given DC voltage across Lm1 when S is off vextra n3 S off S on D2 n1:n2 Lm1 vg RL vO C L + - D1 S n1:n1:n2 Lm1 vg RL vO C L + - D1 D2 D3 Standard design: vextra = vg n3 = n1 Final implementation: the Forward converter SEA_uniovi_CC1_57

As the Buck converter replacing vg with vgn2/n1 The Forward converter As the Buck converter replacing vg with vgn2/n1 S n1:n1:n2 Lm1 vg RL vO C L + - D1 D2 D3 iO iL RL vgn2/n1 vO C L + - Inductor magnetizing stage S & D2 on, D1 & D3 off, during dT S & D2 off, D1 on, Transformer magnetizing stage vg Lm1 vL + - im1 iO iL RL vO C L + - Inductor demagnetizing stage during (1-d)T D3 on, during d’T Transformer reset stage vg Lm1 vL + - im1 vO = dvgn2/n1 vSmax = 2 vg dmax = 0.5 (reset transformer) SEA_uniovi_CC1_58

Achieving a Buck-Boost converter with galvanic isolation (I) vO - + C D vg L S RL Buck-Boost There is a place with average voltage equal to zero: the inductor Inductor and transformer integrated into only one magnetic device (two-winding inductor) vg S L RL vO C - + D n1:n2 Lm1 S on S off n1:n2 L RL vO C - + D vg S SEA_uniovi_CC1_59

Achieving a Buck-Boost converter with galvanic isolation (II) n1:n2 L RL vO C - + D vg S Two-winding inductor S on, D off, during dT Charging stage vg L1 vL + - ig S n1:n2 vg RL vO C + - D L1 L2 S off, D on, during (1-d)T iO RL vO C - + vLn2/n1 Discharging stage L2 Final implementation: the Flyback converter SEA_uniovi_CC1_60

Analysis in steady-state in CCM The Flyback converter Analysis in steady-state in CCM Volt·second balance: dTvg/n1 - (1-d)TvO/n2 = 0 Þ vO = vg(n2/n1)·d/(1-d) Therefore, the result is the same as Buck-Boost converter replacing vg with vgn2/n1 vSmax = vg + vOn1/n2 vDmax = vgn2/n1 + vO S n1:n2 vg RL vO C + - D L1 L2 Very simple topology Useful for low-power, low-cost converters Critical “false transformer” (two-winding inductor) design SEA_uniovi_CC1_61

Achieving other converters with galvanic isolation (I) RL vg vO + - L1 C2 S D L2 C1 SEPIC n1:n2 + - C vg L S D RL vO Boost It is not possible with only one transistor!! n1:n2 RL Vg VO + - L1 C3 S D L2 C1 C2 Cuk Zeta converter is also possible vO = vg(n2/n1)d/(1-d) vSmax = vg + vOn1/n2 vDmax = vgn2/n1 + vO Like the Flyback converter SEA_uniovi_CC1_62

Other converters from the Buck family but for higher power level Achieving other converters with galvanic isolation (II) Other converters from the Buck family but for higher power level Push-Pull vg vSmax = 2vg iS_avg = PO/(2vg) High voltage across the transistors and moderate current Þ for low input voltage Half-Bridge vg vSmax = vg iS_avg = PO/vg Lower voltage across the transistors but higher current Þ for high input voltage vSmax = vg iS_avg = PO/(2vg) Lower voltage across the transistors and moderate current Þ for high power Full-Bridge vg SEA_uniovi_CC1_63

Two-winding magnetic devices for DC/DC converters (I) Transformer leakage inductance must be minimized. Otherwise, voltage spikes increase the voltage stress across semiconductor devices in many converters n2 n1 n2/3 2n1/3 2n2/3 n1/3 without interleaving (high leakage) with interleaving (low leakage) SEA_uniovi_CC1_64

Two-winding magnetic devices for DC/DC converters (II) x H(x)2 H(x)2 x These areas are proportional to the leakage inductance SEA_uniovi_CC1_65

The heart of the control circuitry is the Pulse-Wide Modulator PWM The control circuitry in DC/DC converters (I) The heart of the control circuitry is the Pulse-Wide Modulator PWM VP VV VPV PWM vd TS tC Ramp generator (oscillator) - + vgs vd + - vgs + - vd - VV VPV d = SEA_uniovi_CC1_66

The control circuitry in DC/DC converters (II) Standard ICs to control DC/DC converters also include: - Error amplifier - Comparators for alarms - Some logic circuitry - Driver - Linear regulator - + Ramp generator (oscillator) vgs + - Driver Logic circuitry - + Av vd + - - + Reg V SEA_uniovi_CC1_67

Output-voltage feedback loop The control circuitry in DC/DC converters (III) - Vref Av Output-voltage feedback loop vd RL vg vO PWM Power stage Driver A dynamic model of the power stage must be known to calculate the compensator AV and, therefore, to be able of properly closing the feedback loop SEA_uniovi_CC1_68

The control circuitry in DC/DC converters (IV) Dynamic modelling Dynamic modelling of the power stage of DC/DC converters is a complex task Linear models can be obtained using average techniques and linearizing the equations obtained (small-signal modelling) Small-signal average linear models loss information about voltage and current ripple Small-signal average linear models are only valid for frequencies well-below switching frequency (average models) Small-signal average linear models lead to canonical circuits to study the converter behaviour (in CCM and DCM) SEA_uniovi_CC1_69

Small-signal average models for DC/DC converters in CCM ^ e(s)·d Leq RL C vg + - vO j·d 1:N Quantities with hats are perturbations Quantities in capitals are steady-state values “s” is Laplace variable VO RL j = Leq = L N = D D2 e(s) = Buck: Boost: Leq RL e(s) = VO(1- s) VO RL (1-D)2 j = L (1-D)2 Leq = 1 1-D N = -VO RL(1-D)2 j = L (1-D)2 Leq = -D 1-D N = DLeq RL e(s) = (1- s) D2 Buck-Boost (VO<0) : SEA_uniovi_CC1_70