Mohammad Reza Ghaderi Karkani

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Presentation transcript:

Mohammad Reza Ghaderi Karkani mrghaderi@ece.ut.ac.ir University of Tehran Faculty of Electrical and Computer Engineering ASIC Design Course – Spring 85 – Instructor: S. M. Fakhraei Class Seminar: Multi-Standard Radio Mohammad Reza Ghaderi Karkani mrghaderi@ece.ut.ac.ir Most of materials are borrowed from ISSCC 2006 proceeding CD 5/30/2006

Outlines Introduction Radio Hardware Platform Recent works Conclusion GSM/GPRS GPS for Cell-phones DVB-H MB-OFDM UWB GSM/802.11g WLAN Conclusion

Introduction Reconfigurable devices for combined signal paths are technology enablers for Multi band, Multi mode, Software Radio and Multi standard Radios. Features for future multiradio devices: Cellular: GSM/WCDMA/… Wireless broadband: WLAN 802.11a/b/g/n/… Short range connectivity: BT & UWB Positioning: GPS/Galileo Broadcast/TV: DVB-H Design considerations: Architecture and system partitioning Power management IP blocks and interfaces

From Factor of Multimedia WCDMA/GSM GPS/GALILEO BT/WLAN DVB-H UWB WLAN diversity WCDMA diversity

Radio Hardware Platform How many ASIC’s? Single-chip radios or separate RF & BB ASIC’s External RF components: antennas, filters, PA’s, switches,… How many modules? Antennas distributed all over the product Increased ASIC integration level not any more the only driver in system architectural partitioning Options Separate single-chip ASIC’s or system modules close to antenna One centralized modem with distributed antennas Something in between (including different choices)

A Fully Integrated SoC for GSM/GPRS in 0.13µm The chip is implemented in a 0.13μm CMOS technology. It features linear MIM capacitors that can be placed on top of active regions, blocked polysilicon resistors, high ohmic substrate for crosstalk reduction and improved inductor Q-factor, and up to 6 metal layers with a thicker top layer. The digital part comprises a microcontroller, a DSP, 256kB SRAM, 2Mb ROM, and several interfaces. The transmitter features direct modulation with a ΔΣ fractionaln PLL, thus no TX-DAC is required. The ΔΣ modulation approach in TX is chosen because of its robustness against process variations. [2] Infineon

A Fully Integrated SoC for GSM/GPRS in 0.13µm [2]

A Fully Integrated SoC for GSM/GPRS in 0.13µm Crosstalk from the digital blocks into RF is one of the biggest concerns in single-chip transceivers. Substrate noise pickup, package crosstalk, magnetic coupling between the coils, and supply coupling degrade the RF performance. [2] Crosstalk from the digital blocks into RF is one of the biggest concerns in single-chip transceivers. A critical coupling path is shown in Figure 26.7.6. Substrate noise pickup, package crosstalk, magnetic coupling between the coils, and supply coupling degrade the RF performance. High-frequency harmonics of the system clocks near the LO frequency couple into the VCO and generate spurs in the TX modulation spectrum. Low-frequency components of the system clocks couple into the LO path and generate spurs in the corresponding RX band.

A 20mW 3.24mm2 Fully Integrated GPS Radio for Cell-Phones Cellular phones with embedded GPS engines will enable network-based positioning methods. Assisted GPS solutions allow a direct migration path into 3G handsets besides being more accurate than cell tower-based ones. [3] RFDomus

DVB-H DVB-H is a new standard that is expected to be widely deployed in future mobile devices. The first DVB-H field trials were held in Europe and used the UHF band. DVB-H has also been targeted for deployment in the United States using L-band spectrum between 1670MHz and 1675MHz. There has also been discussion of reallocating European L-band DAB frequencies for DVB-H service.

Dual-band Single-Ended-Input Direct-Conversion DVB-H Receiver The mixer is the only device in the signal path that has to cover the entire frequency range from 470MHz to 1900MHz. [4] Microtune, Plano

A Multi-Band Multi-Mode CMOS Direct-Conversion DVB-H Tuner The IC is implemented in a 0.18μm 40GHz-fT CMOS technology. [5] Samsung

Measured performance summary comparison Dual-band Single-Ended-Input Direct-Conversion DVB-H Receiver► [4] ◄A Multi-Band Multi-Mode CMOS Direct-Conversion DVB-H Tuner (0.18μm 40GHz-fT CMOS technology) [5]

A 1.1V 3.1-to-9.5GHz MB-OFDM UWB Transceiver in 90nm CMOS transceiver has a direct-conversion architecture containing a frequency synthesizer that generates 12 bands over 3.1 to 9.5GHz The synthesizer consists of a single 8.4GHz quadrature-VCO (Q-VCO) and divide-by-two dividers, low frequency (LF) SSB mixers with a VGA for wideband LO power flatness, and high-frequency (HF) SSB mixers. All the LO frequencies needed for 3.1 to 9.5GHz operation are generated from this single Q-VCO, which contributes to low power consumption. The VCO frequency is low enough to use low-power D-latch-based frequency dividers. A harmonic suppressing filter is introduced at the LF mixer output terminal. The cut-off frequency of the filter is programmed to be switched in accordance with changing bands. Further, in order to maintain constant LF output power over a wide frequency range (from 792 to 1848MHz), the VGA that follows this filter is also programmed to change its gain, so that the LF output power is held constant. Mixers operating in the gigahertz range with narrow-channel differential pairs have a serious problem of high LO leakage resulting from process variations. They use a back-bias calibration design in which each mixer receives a calibration voltage from an analog bus. [6] NEC

A 1.1V 3.1-to-9.5GHz MB-OFDM UWB Transceiver in 90nm CMOS [6]

Software-Defined Radio Receiver A software-defined radio (SDR) can tune to any frequency band, select any reasonable channel bandwidth, and detect any known modulation. While progress has been made on DSP and baseband functions for SDR, the low-power radio front-end has remained elusive. An ADC at the antenna which digitizes all bands simultaneously with equal fidelity will not be practical in the foreseeable future. Today’s mobile SDR receiver needs a wideband, linear RF front-end that can be tuned to any one channel at a time in the band from 800MHz to5GHz.

An 800MHz to 5GHz Software-Defined Radio Receiver in 90nm CMOS To serve the gamut of cellular and WLAN standards, the ADC should be reconfigurable; for instance, GSM reception needs 14b DR in a 200kHz bandwidth and 10MHz sample rate, whereas 802.11g reception needs a DR of 8b across the Nyquist band at 40MHz rate. It comprises an LNA spanning a passband of 400MHz to 5GHz and an LO generator that tunes to important bands in this range. There is no RF preselect filter before or after the LNA. A complex mixer downconverts the channel of interest to zero or low IF. It is found by trial and error that the cascade of a discrete-time pole at a fraction of fs, a sinc2 FIR filter that decimates by 4, and a sinc FIR filter that decimates by 3 or 2 is sufficient for almost all practical cases. [7] UCLA

An 800MHz to 5GHz Software-Defined Radio Receiver in 90nm CMOS The on-chip receiver selectivity at 900MHz is sufficient for GSM and at 2.4GHz for 802.11g WLAN [7]

Conclusion Multi-Standard Radio Design is not only an ASIC level issue Hierarchical design and design abstraction are needed in system design Hybrid solutions cover numerous different options to realize Multi-Standard Radio

References A. Parssinen, “System Design For Multi-Standard Radios,” ISSCC 2006, GIRAFE forum. J. Kissing, R. Koch, “A Fully Integrated SoC for GSM/GPRS in 130nm CMOS,” ISSCC 2006. V. Della Torre, et al., “A 20mW 3.24mm2 Fully Integrated GPS Radio for Cell-Phones ,” ISSCC 2006. M. Womac, et al., “Dual-Band Single-Ended-Input Direct-Conversion DVB-H Receiver ,” ISSCC 2006. Y. J. Kim, et al., “A Multi-Band Multi-Mode CMOS Direct-Conversion DVB-H Tuner,” ISSCC 2006. A. Tanaka, et al., “A 1.1V 3.1 to 9.5 GHz MB-OFDM UWB Transceiver in 90nm CMOS,” ISSCC 2006. R. Bagheri, et al., “An 800MHz-5GHz Software-Defined Radio Receiver in 90nm CMOS,” ISSCC 2006.

Questions?

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