GLAST LAT ProjectDOE/NASA Review of the GLAST/LAT Project, Aug. 14, 2001 Robert P. Johnson 1 GLAST Large Area Telescope: Silicon-Strip Tracker/Converter Robert P. Johnson U.C. Santa Cruz Tracker Subsystem Manager Gamma-ray Large Area Space Telescope

GLAST LAT ProjectDOE/NASA Review of the GLAST/LAT Project, Aug. 14, 2001 Robert P. Johnson 2 Silicon-Strip Tracker/Converter Outline  Recommendations from the February review  Tracker Peer Design Review  Tracker Technical Progress  Silicon-Strip Detectors  Mechanical Design  Tray Assembly  Electronics Design  Electronics Assembly  Tracker Test Plans  Tracker LAT PDR Preparations

GLAST LAT ProjectDOE/NASA Review of the GLAST/LAT Project, Aug. 14, 2001 Robert P. Johnson 3 Recommendations from February Build an explicit Tracker reserve of at least 4 months into the fabrication schedule. –This has been done. Produce detailed test plans, including testing of the electronics beyond the expected operational conditions. –Mechanical and electrical test plans have been drafted. –Detailed procedures for prototype ASIC testing have been drafted, and those tests are just beginning. –Work is in progress on building the electronics test systems. –Detailed test procedures and verification matrix for testing during production remain to be written. Add milestones to the Tracker development schedule –Detailed schedules have been put together (in MS Project) for completion of the prototype trays and the Tracker engineering model during the coming year.

GLAST LAT ProjectDOE/NASA Review of the GLAST/LAT Project, Aug. 14, 2001 Robert P. Johnson 4 LAT Tracker Peer Design Review Draft Preliminary Design Report: LAT-TD additional Tracker documents prepared for the PDR: –Requirements –Mechanical/thermal design report –Electronics conceptual design and specifications –Mechanical and electrical interface specifications –Grounding and shielding plan –Reliability analysis –Parts lists –Mechanical and electrical test plans The review was held June 19, 2001, with a panel that included 2 outside experts: one with SSD experience in HEP; one aerospace expert. The outcome of the review was generally positive. All questions were answered. Work is in progress on complying with the detailed recommendations, in preparation for the PDR.

GLAST LAT ProjectDOE/NASA Review of the GLAST/LAT Project, Aug. 14, 2001 Robert P. Johnson 5 Silicon-Strip Detectors Hamamatsu Photonics (HPK) detector prototypes satisfied all of our requirements. A preproduction run is in progress at HPK, with >300 SSDs manufactured and tested. The preproduction SSDs are of excellent quality. SLAC has tendered a contract for the first production run at HPK. 2 European firms are still working on prototype runs, but HPK production can meet our full demand. Current (nA) Average leakage current per run for 10 preproduction HPK SSD runs.

GLAST LAT ProjectDOE/NASA Review of the GLAST/LAT Project, Aug. 14, 2001 Robert P. Johnson 6 Mechanical Design Detailed design of the tray panels (thin converter, thick converter, top & bottom) is complete. Prototype tray panels are being fabricated both in Italy and the U.S. Two tower-module assembly methods have been devised and will be tested in September: –Stacked trays. –External fixture. A full prototype tower will be constructed from prototype trays and mass-model trays for vibration testing before construction of the Tracker engineering model.

GLAST LAT ProjectDOE/NASA Review of the GLAST/LAT Project, Aug. 14, 2001 Robert P. Johnson 7 Tray Panel Construction Structural Closeout WallMCM Closeout Wall Inside Outside Inside Outside Graphite fixture for closeout and tray panel assembly. Tray panel: 4 C-C closeout sides, Al core, C-fiber face sheets.

GLAST LAT ProjectDOE/NASA Review of the GLAST/LAT Project, Aug. 14, 2001 Robert P. Johnson 8 Tracker Mechanical/Thermal Interface A conceptual design was completed for attachment of the Tracker to the Grid: –Blade flexures to avoid stress from CTE differences. –Thermal gasket to aid the transfer of heat into the Grid. Some modeling has been completed (next slide). Some details need more work (such as how to ensure adequate compression of the gasket).

GLAST LAT ProjectDOE/NASA Review of the GLAST/LAT Project, Aug. 14, 2001 Robert P. Johnson 9 Tower-Level Mechanical Model Typical 1 st Mode Shape of the Flexure Mounted Tower Support 1 st Mode Flexure Deformation

GLAST LAT ProjectDOE/NASA Review of the GLAST/LAT Project, Aug. 14, 2001 Robert P. Johnson 10 Tray Assembly: Ladders Assembly of prototype ladders, including encapsulation, has been completed at two Italian vendors (MIPOT and G&A) Measured alignment of completed ladders meets our specifications. Encapsulated Wire Bonds Ladder edge-bonding fixture

GLAST LAT ProjectDOE/NASA Review of the GLAST/LAT Project, Aug. 14, 2001 Robert P. Johnson 11 Tray Assembly: Ladder Mounting Fixtures for precision mounting of ladders onto tray panels have been designed and tested in Italy. The same vendors as for ladder assembly will do this work during production. Mounting the first ladder onto a tray panel. 4 ladders mounted SSDs Bias Circuits Tungsten Panel MCM

GLAST LAT ProjectDOE/NASA Review of the GLAST/LAT Project, Aug. 14, 2001 Robert P. Johnson 12 Electronics Design: Readout ASIC Migrate design from HP 0.8  m to HP 0.5  m CMOS process. Substantial redesign of analog front end (now 2.5 V). LVDS on all I/O (except hard reset and config. reg. output). Configuration register now is SEU hardened (tested with heavy ions). Config. reg. divided into 5 pieces; now nondestructive read. System clock and output-register clock are on continuously. Old FIFO for event buffering is now RAM. Full prototype is under test  all features are functional. 64 amplifier-discriminator channels. Redesigned w.r.t. BTEM version. AC coupled to discriminator. 4-deep event memory (addressed by TEM) Custom layout 2 custom DACs I/O Cells Control logic, command decoders Standard-cell auto route Cap Calibration mask and capacitors I/O pads and protection structures Trigger and Data mask registers Standard-cell auto route

GLAST LAT ProjectDOE/NASA Review of the GLAST/LAT Project, Aug. 14, 2001 Robert P. Johnson 13 Electronics Design: Controller ASIC All digital, standard cell design, except for LVDS I/O cells. SEU hardened configuration register. Ground-up new design in VHDL; synthesis, auto place and route. Functionality is similar to the BTEM chip, but many interface and data format details are changed. 25  s (TBR) limit on the TOT. Full prototypes are under test for both the TSMC (0.25  m) and HP (0.5  m) CMOS processes. Layout of the GTRC chip in the TSMC process.

GLAST LAT ProjectDOE/NASA Review of the GLAST/LAT Project, Aug. 14, 2001 Robert P. Johnson 14 Electronics Design: PWBs Tracker MCM (readout module): –PWB layout is complete. –7-chip “mini” version for initial system tests is in fabrication. –Face-to-face meetings were held in L.A. last week with the vendor for the full-scale aramid-fiber version. Pitch adapter flex circuit. Prototypes are in hand from 2 vendors and are being used to study MCM assembly. Bias flex circuit: prototypes are in fabrication. Flex readout cables: –Layout was completed on the first of eight. –Quotations are in progress at 2 vendors. –The final length still is undetermined.

GLAST LAT ProjectDOE/NASA Review of the GLAST/LAT Project, Aug. 14, 2001 Robert P. Johnson 15 Tracker MCM Assembly Wire bonds from a readout ASIC to flex Bonding a pitch adapter to an MCM PWB. Teledyne, in L.A., will solder SMT parts, bond the pitch adapter, mount ASICs, wire bond, test, and encapsulate. Face-to-face meetings were held with Teledyne last week in L.A. Work will begin immediately on tooling and on assembly of initial (non- functional) prototypes.

GLAST LAT ProjectDOE/NASA Review of the GLAST/LAT Project, Aug. 14, 2001 Robert P. Johnson 16 Tracker Electronics Test Systems Systems for complete testing of the prototype ASICs are in progress. Conceptual designs are complete for ASIC wafer probing  probe cards and PWBs are being designed. MCM production testing  custom VME module is in hand. MCM burn-in  PWB design is in progress. Work is in progress to define the detailed test vectors and procedures for tray and tower electronics testing. Test system for ASIC wafer probing.

GLAST LAT ProjectDOE/NASA Review of the GLAST/LAT Project, Aug. 14, 2001 Robert P. Johnson 17 Tracker Test Plans Environmental Testing –LAT-TD-00154Tracker Tray Test Plan –LAT-TD-00155Tracker Tower Test Plan Electronics Testing –LAT-TD-00153Test Systems for the Tracker Front-End Electronics –LAT-TD-00191Tracker Tower Electrical Test Plan –LAT-TD-00246Tracker Front-End Chip Test Plan –LAT-TD-00247Tracker Front-End Readout Chip Wafer Test Procedure –LAT-TD-00248Tracker Readout-Controller Chip Wafer Test Procedure –LAT-TD-00249Tracker TMCM Electrical Test Procedure

GLAST LAT ProjectDOE/NASA Review of the GLAST/LAT Project, Aug. 14, 2001 Robert P. Johnson 18 Tracker PDR Preparations Update of the PDR documentation: –Improvement of the reliability analysis. –Improved requirements documents. –More complete electronics test plans, test procedures, and verification matrix. Completion of the prototype mechanical structure, including assembly tests. Vibration tests on trays. Possibly tower vibration, as well. Ion-beam SEL and SEU tests on Tracker ASICs. Test results on the Tracker ASICs in the full flight design, including an integrated test with both ASICs, a mini-MCM, and a full-length SSD ladder. Finalized baseline budget and schedule.