Chapter 7 Oxidation 半導體製程 材料科學與工程研究所 張翼 教授

Silicon Dioxide layer uses Surface passivation Doping barrier Surface dielectric Device dielectric: Field oxide,Gate oxide

Figure 7.1 Surface passivation with silicon dioxide layers. Silicon dioxide is very hard and dense can be used as passivation layer:Preventing dirt,scratches, chemical reactions. Surface contaminants on the surface end up in the oxide during the oxide growth, can oxide the surface and then remove the oxide to rid the surface of unwanted mobile ion contaminations

Figure 7.2 Silicon dioxide layer as dopant barrier. Silicon dioxide layer can block the dopant form reaching the silicon surface. (very low hole density) Silicon dioxide thermal expansion coefficient is similar to silicon, wafer will not warp during high temperature process

Figure 7.3 Dielectric use of silicon dioxide layer. Silicon dioxide can be used as insulator between metal and silicon. However, it must be think enough not to induce induction in the silicon surface. Induction:oxide between metal is thin that electrical charge in the metal line induces charges on the metal surface. Field oxide: oxide that is thick enough not to induce the charge on the wafer surface.

Figure 7.4 Silicon dioxide as field oxide and in MOS gate. Field oxide: oxide that is thick enough not to induce the charge on the wafer surface.

Figure 7.4 Gate oxide: oxide as dielectric Nf Gate oxide: oxide as dielectric With thickness thin enough to allow induction of a charge in the gate region under the oxide can be as thin as 35 to 80 Å range

Figure 7.5 Silicon dioxide layer in solid-state capacitor. Can be used as an dielectric layer between the silicon wafer and a surface conduction layer

Figure 7.6 Silicon dioxide thicknesses chart.

Figure 7.7 Reaction of silicon and oxygen to form silicon dioxide.

Figure 7.8-(1) Silicon dioxide growth stages: (a) initial

Figure 7.8-(2) Silicon dioxide growth stages: (b) linear X=αt

Figure 7.8-(3) Silicon dioxide growth stages: (c) parabolic ↓↓ → Si + O2 = SiO2

Figure 7.9 Linear and parabolic growth of silicon dioxide. Oxides less than 1000 Å are formed by linear mechanism(e.g.Gate oxide) Thicker oxides (e.g. masking oxides) are formed by parabolic relationship

Figure 7.10 Parabolic relationship of SiO2 growth parameters.

Figure 7.11-(1) Silicon dioxide thickness versus time and temperature in (a) dry oxygen. 2000 Å at 1200oC requires 6 min 4000 Å at 1200oC requires 220 minutes

Figure 7.11-(2) Silicon dioxide thickness versus time and temperature in (b) steam(H2O). Using H2O as oxidizing gas oxides grow faster since hydroxyl ion OH- diffuses faster in the oxide faster than oxygen Higher oxide growth rate!

Figure 7.12 Reaction of silicon and wafer vapor to form silicon dioxide and hydrogen gas. Wet Oxidation :oxides grow with H2O Dry Oxidation : oxides grow with oxygen After wet oxidation, H2 are trapped in the oxides, making it less condense, after heating in inert atmosphere, such as nitrogen, the two oxides become identical

Figure 7.13 Oxidation of <111> and <100> silicon in steam. Larger number of atoms on the surface allows a faster growth rate of oxide on silicon

Oxidation of Polysilicon Polysilicon oxidation rate can be faster, slower or similar to single crystal silicon depending on the deposition method, deposition temperature, deposition pressure, the type and concentration of the doping, and the grain structure of the polysilicon.

Figure 7.14 Differential oxidation of silicon. Polysilicon- Depending on the surface condition of the wafer,the oxide thickness on the wafer is different on different areas, this is called differential oxidation

Figure 7.15 Oxidation methods.

Figure 7.16 Cross section of single horizontal tube furnace with three heating zones.(also called diffusion furnace) Conduction and radiation between coil and tube occurred Ceramic liner - as heat sink to foster more even heat distribution along the tube -Quartz reaction tube Separate power supply for different heating zone Thermocouple Positioned along the tube send back the temperature information to the Controller to control the temperature within +-0.5C

Figure 7.17 Tube furnace. Scavenger connected to the exhaust system which contains a scrubber to remove toxic gases Constant nitrogen flow during loading /unloading to keep dirt out and prevent oxidation Tubes are vertically on top of each other (usually 3-4 tubes)

Figure 7.18 Temperature levels during oxidation. Full load of wafers can drop the tube temperature as much as 50oC Need to fast recovery time for the heating system without introducing wafer warping condition or over shoot

Wafer Warping Large diameter wafers processed at higher temperatures (above 1150oC) tend to warp due to rapid heating and cooling causing wafers to be useless Temperature ramping and slow loading are two methods to reduce wafer warping Temperature ramping: wafers are inserted into the the furnace at lower temperature and after the temperature is stabilized, slowly increased to the process temperature. After process cycle, the furnace is cooled to lower temperature before wafers are removed Slow loading:Slow loading of the wafers into the furnace at a rate of 1 in/min

Figure 7.19-(1) (a) Operating principle of mass flow meter Gases need to delivered at specific flow rate, pressure and for a specific time When no gas is flowing, both sensors are at the Same temperature With gas flow, difference between two sensors is related to the amount of heat mass (not volume) that moved down stream which can be related to a steady amount of material flows through the meter

Figure 7.19-(2) (b) cutaway

Oxidant sources Dry oxidation:compressed dry oxygen not contaminated with water vapor (water vapor will increase oxidation rate), a preferred method to grow very thin gate oxide (<1000Å) for MOS devices Water vapor sources:Several choices depends on the required thickness and cleanliness

Figure 7.20 Bubbler water vapor source. steam Drawback: Control of water vapor flux is difficult due to water level and water temperature fluctuation As carrier gases pass through the vapor, it becomes saturated with water vapor heat water to boiling temperature 98-99oC

Figure 7.21 “Dryox” (dry steam) water vapor source. Wet oxidation in steam Draw back: Hydrogen is explosive To prevent explosion: 1.separate O2 and H2 lines 2.flowing excess oxygen to form Non-explosive Water molecules 3.hot element to burn off excess H2 at source cabinet and scavenger Two gases mix and form steam at high temperature Improved control over thickness and cleanliness over liquid system Due to 1. gases are very clean and dry; 2.flow amount can be precisely controlled by MFC Dryox is preferred oxidation method for production for all advanced devices

Chlorine added oxidation Improves cleanliness and device performance Chlorine reduces MIC, structural defects in oxide and wafer surface,and reduces charges at oxide silicon interface Use Cl2, HCl,or TCE,TCA in dry oxygen gas stream TCA is preferred due to safety and easy delivery

Figure 7.22 Wafer boat and cradle.

Figure 7.23-(1) Manual wafer handling devices. (a) Vacuum pickup

Figure 7. 23-(2) Manual wafer handling devices Figure 7.23-(2) Manual wafer handling devices. (b) limited grasp tweezer

Figure 7.23-(3) Manual wafer handling devices. (c) flip transfer boats

Figure 7.23-(4) Manual wafer handling devices. (d) Auto pick and place

Figure 7.24 Transfer tube loading of wafers. Time, Temperatures, gas sequences, and push-pull Rates ( recipe) are programmed into a host computer

Figure 7.25 Vertical tube furnace. Greater contamination control (no particle generation due to boat scraping the sides of the tube), particle density reaches 0.01/cm2 range Larger wafer size (>200mm) (horizontal tube has a limit) Smaller foot print (less expensive clean room) Laminar flow(uniform with non separation of the gases into layers and without turbulence ) is difficult to keep in larger diameter wafer tube Can rotate wafer to get better uniformity (only 60% variation of the horizontal furnace)

Rapid thermal processing (RTP) Fast Ramp Furnace: fast ramp,low batch furnace, tens of degree per minute heating rate (Conventional:few degree per minute), reduces ramp up and ramp down time, save cost RTP: Radiation heating , Heat sources include:graphite heaters, microwave, plasma and; tungsten halogen lamps Tungsten halogen lamps are most popular Very short heating, the body of wafer never get heated, Reduce dopant diffusion Reduce thermal budget, saves energy Minimize total heating/cooling time, reduces dislocations Single wafer process for large wafer with uniform requirement RTO (rapid thermal oxidation):grow thin oxide for MOS (<100Å)with smaller feature sizes

Figure 7.26 RTP design (Source: Semiconductor International, May 1993). Thermal couple contact from the back (slow response time) and optical Pyrometer are used for temperature detection Can add heated annular ring to keep the edge of the wafer in the right temperature range

Figure 7. 27 Example RTP time/temperature curve Figure 7.27 Example RTP time/temperature curve. (Source: Semiconductor International, May 1993). Weakness: temperature uniformity,wafer edge is particularly bad Different emissivity due to different layers causing nonuniformity in temperature during heating

Figure 7.28 Oxidation of silicon by RTO (Source: Ghandi, VLSI Fabrication Principles).

Problems with high temperature oxidation High thermal budget Growth of dislocations in the bulk of the wafer causing device performance problems Growth of hydrogen induced dislocations along the edge of openings in layers on the surface (surface dislocation) causing electrical leakage along the surface and degradation of silicon layers grown on the wafer for bipolar circuits Growth of dislocation is a function of the temperature and the time the wafer spends on the high temperature These factors lead to high pressure, lower temperature oxidation

Figure 7.29 High-pressure oxidation. Quartz tube encasing in stainless steel and sealed with oxidant at 10-25 atm 1 atm increase in pressure allows 30oC drop in temperature, the system allows 300 to 750oC drop in temperature, this will minimize dislocation growth Can use high temperature high pressure growth but at shorter time

High pressure oxidation Good for very thin gate oxide growth because thin gate oxide requires structure integrity (no holes) and higher dielectric strength (high pressure grown oxide has better dielectric strength) Good for solving bird’s peak problem during LOCOS process

Figure 7.30-(1) Bird’s beak growth: (a) no pre-etch

Figure 7.30-(2) Bird’s beak growth: (b) 1000 Å pre-etch

Figure 7.30-(3) Bird’s beak growth: (c) 2000 Å pre-etch (From Ghandhi, VLSI Fabrication Principles)

Figure 7.31 Oxidation process flow. Surface cleaning is importance for high temperature growth: 1.Contaminants may diffuse into the wafer 2.Thin native oxide may alter thickness and integrity of grown oxides Cleaning process: Mechanical scrubber RCA wet cleaning HF-last process

Figure 7.32 Oxidation process cycles. (need dry nitrogen) (thin oxide) (thick oxide>1200Å) Added Chlorine to improve oxide quality for thin gate oxide (can be in one step or be preceded or followed by a dry oxidation cycle)

Figure 7.33 Anodic oxidation. Oxygen created and forms silicon dioxide on the wafer surface Similar to chemical plating Can be used for very thin oxide formation or KNO3 Oxide formed is less condense Silicon diffused to the surface to form oxide, when oxide was etched away, it may leaves silicon with different dopant concentration levels

Figure 7. 34 Nitridation of <100> silicon Figure 7.34 Nitridation of <100> silicon. (Wolf, Silicon Process) (rapid growth followed by flat grown mechanism) For <100Å, oxide quality is poor and hard to control,can not be used for gate Dielectric, silicon Nitride can be used, since it is denser and good diffusion barrier Can also use silicon oxygen nitride (SiOxNy) or ONO oxide/nitrite/oxide Silicon exposed to ammonia between 950 to 1200oC