Embedded Systems & Parallel Programming

- 2 - P. Marwedel, Univ. Dortmund/Informatik 12 + ICD/ES, 2007 Universität Dortmund A view on embedded systems (1)

- 3 - P. Marwedel, Univ. Dortmund/Informatik 12 + ICD/ES, 2007 Universität Dortmund A view on embedded systems (2) Main reason for buying is not information processing Embedded systems (ES) = information processing systems embedded into a larger product Areas: 1.High performance signal processing 2.Control intensive applications 3.High-safety application Tight power constraints, especially for mobile applications

- 4 - P. Marwedel, Univ. Dortmund/Informatik 12 + ICD/ES, 2007 Universität Dortmund Inherent Power Efficiency © Hugo De Man, IMEC, 2007 GOPs/J

- 5 - P. Marwedel, Univ. Dortmund/Informatik 12 + ICD/ES, 2007 Universität Dortmund Examples of Embedded Processors © Hugo De Man, IMEC, 2007 ½ of IPE; obviously heterogeneous processors

- 6 - P. Marwedel, Univ. Dortmund/Informatik 12 + ICD/ES, 2007 Universität Dortmund FAUST chip architecture 4G mobile application 20 nodes with 23 IPs are connected by a network 8MG / 0.13μ CMOS technology (STMicroelectronics) NoC Example t (mem. access) « t (communic.) try to avoid buffering of messages!

- 7 - P. Marwedel, Univ. Dortmund/Informatik 12 + ICD/ES, 2007 Universität Dortmund Programming models for parallel embedded systems (1)

- 8 - P. Marwedel, Univ. Dortmund/Informatik 12 + ICD/ES, 2007 Universität Dortmund Problems with classical CS abstractions Even the core 20th-century notion of computable is at odds with the requirements of embedded software. In this notion, useful computation terminates, but termination is undecidable. In embedded software, termination is failure-yet to get predictable timing, subcomputations must decidably terminate. Ed Lee: Absolutely positively on time: What would it take? IEEE Computer, July, 2005 Finally an end to von-Neumann specifications?

- 9 - P. Marwedel, Univ. Dortmund/Informatik 12 + ICD/ES, 2007 Universität Dortmund Toward different models of computation

P. Marwedel, Univ. Dortmund/Informatik 12 + ICD/ES, 2007 Universität Dortmund Other models of computation & approaches Various types of tasks graphs Kahn process networks Synchronous dataflow Partial differential equations Event queues Generated software …. How much of this is used in practice already?

P. Marwedel, Univ. Dortmund/Informatik 12 + ICD/ES, 2007 Universität Dortmund Generated software examples After the successful use of SCADE on the A340, AIRBUS adopted it for several A380 projects technology/success-stories/airbus.html Production code generation directly from MATLAB®/Simulink®/Stateflow® ANSI C code with the efficiency of handwritten code Optimizations for individual processors Built-in simulation and testing SCADE DSPACE Targetlink

P. Marwedel, Univ. Dortmund/Informatik 12 + ICD/ES, 2007 Universität Dortmund Task to Processor Mapping (1) © L. Thiele et al.

P. Marwedel, Univ. Dortmund/Informatik 12 + ICD/ES, 2007 Universität Dortmund Task to Processor Mapping (2)

P. Marwedel, Univ. Dortmund/Informatik 12 + ICD/ES, 2007 Universität Dortmund Task to Processor Mapping (3)

P. Marwedel, Univ. Dortmund/Informatik 12 + ICD/ES, 2007 Universität Dortmund Task to Processor Mapping (4)

P. Marwedel, Univ. Dortmund/Informatik 12 + ICD/ES, 2007 Universität Dortmund Task to Processor Mapping (5)

P. Marwedel, Univ. Dortmund/Informatik 12 + ICD/ES, 2007 Universität Dortmund 2nd example

P. Marwedel, Univ. Dortmund/Informatik 12 + ICD/ES, 2007 Universität Dortmund Demonstrated parallelism: SymTA/S Screenshot

P. Marwedel, Univ. Dortmund/Informatik 12 + ICD/ES, 2007 Universität Dortmund Parallel Accelerator: Triscend A7 CSoC ARM7TDMI + FPGA Source: © Triscend

P. Marwedel, Univ. Dortmund/Informatik 12 + ICD/ES, 2007 Universität Dortmund Parallel Accelerator: Chameleon C/Verilog –based reconfigurable platform Application of HPC techniques?

P. Marwedel, Univ. Dortmund/Informatik 12 + ICD/ES, 2007 Universität Dortmund Conclusion Parallel embedded systems are a reality Architectures include heterogeneous MPSoCs (also NoCs), parallel accelerators. Multiple threads a potential problem Introduction of new models of computation realistic Higher level programming acceptable Parallel execution existing standard for ECUs for MPSoCs, NoCs for accelerators Situation different from HPC