Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 Decision Diagrams: Principles of Programming Dragan.

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Presentation transcript:

Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 Decision Diagrams: Principles of Programming Dragan Janković Faculty of electronic engineering University of Niš

Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 OUTLINES - Introduction - Binary decision diagrams - Multiple-valued decision diagrams - Applications in Logic design - Implementation principles - Shared DDs - Unique table - Strong canonicity - Attributed edges - Computed table - Memory management and dynamic reordering - Universal DD package - Conclusion

“ Give me enough strong support, I will move the Earth up “ Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Verification of synthesized netlist vs. final netlist Final – 2843 inputs, 4178 outputs, states – million gates – loc (parsed in 1:41 min) Synthesis – 2843 inputs, 4178 outputs, states – million gates – loc (parsed in 15 sec) Equivalence Check: 18:10 CPU min, GByte Circuit complexity Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Logic design problems and the others Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

“ Decision diagrams are the state-of-the-art data structure in VLSI CAD for representation and manipulation of Discrete functions “ W H Y ? Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Binary Decision Trees. A BDT is a rooted, directed tree that consists of two types of nodes, terminal nodes and nonterminal nodes. –Each nonterminal node v is labeled by a variable var(v) and has two successors : – low(v) corresponding to the case where the variable v is assigned 0 – and high(v) corresponding to the case where v is assigned 1. –Each terminal node v is labeled by value(v) which is either 0 or 1. Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Graphical representation index(v) = 2 v non-terminal terminal value(u) u high(v) low(v) Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Truth Table Decision Tree –Node represents decision –Follow blue line for value 0 –Follow red line for value 1 –Function value determined by terminal value. x1x1 x3x3 x2x2 x3x3 x3x3 x3x3 10 x2x Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

1) Merge equivalent terminals aa a Reduction rules Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

y x z x 2) Merge isomorphic nodes y x z x y x z x Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

3) Eliminate Redundant Tests y x y Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 ROBDD or BDD

Binary Decision Diagram A BDD is a rooted, directed acyclic graph with two types of vertices, terminal vertices and nonterminal vertices. –Each nonterminal vertex is labeled by a variable var(v) and two successors, low(v) and high(v) –Each terminal vertex is labeled by a either 0 or 1. Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

STATE – OF – THE – ART DATA STRUCTURE ???? Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Functions –All outputs of 4-bit adder –Functions of data inputs Shared Representation –Graph with multiple roots –31 nodes for 4-bit adder –571 nodes for 64-bit adder *Linear growth Representing Circuit Functions Truth-vector Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Logic Circuit Comparison –Do circuits realize identical function? Basic task of formal hardware verification Compare new design to “known good” design Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Generate Complete Representation of Circuit Function –Compact, canonical form –Functions equal if and only if representations identical –Never enumerate explicit function values –Exploit structure & regularity of circuit functions Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

NetworkEvaluation Task: Represent output functions of gate network as OBDDs. Resulting Graphs A  new_var ("a"); B  new_var ("b"); C  new_var ("c"); T1  And (A, 0, B); T2  And (B, C); Out  Or (T1, T2); Generating OBDD from Network Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Verification –Combinational equivalence (UCB, Fujitsu, Synopsys, …) –FSM equivalence (Bull, UCB, MCC, Siemens, Colorado, Torino, …) –Symbolic Simulation (CMU, Utah) –Symbolic Model Checking (CMU, Bull, Motorola, … ) Synthesis –Don’t care set representation (UCB, Fujitsu, …) –State minimization (UCB) –Sum-of-Products minimization (UCB, Synopsys, NTT) Test –False path identification (TI) Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Systems Represented as Finite State Machines –Sequential circuits –Communication protocols –Synchronization programs Analysis Tasks –State reachability –State machine comparison –Temporal logic model checking Traditional Methods Impractical for Large Machines –Polynomial in number of states –Number of states exponential in number of state variables. –Example: single 32-bit register has 4,294,967,296 states! Finite State System Analysis Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Pentium bug 475 million $ loss Verification (equivalence check) RTL compiler net compiler gate synthesis cons. compare Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

How to implement Decision Diagrams ? Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Minimal memory Efficient manipulation Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

The basic tasks in DD programming Determine the data structure to represent a node Provide efficient construction of DDs from a specification Provide efficient manipulation “Optimal” DD does not exist – Dependent on the underlying application one should be favored There are a different types of DDs Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

DDs based packages - standard part of many VLSI CAD systems - efficient implementation of one or a few strongly related DD types for some particular class of discrete functions (BDD, KDD, …) Existing packages: Rudell’s package (Synopsys) David Long’s package (Carnegie Mellon University) in SMV, VIS, SIS. CUDD (University of Colorado) PUMA (University of Freiburg) BEMIITA, etc. Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Basic principles in DD programming  Shared DDs  Unique table  Strong canonicity  Attributed edges  Computed table  Memory management and dynamic reordering Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Node representation struct DdNode { DdHalfWord index; - index of variable assigned to the node DdHalfWord ref; - counter of references DdNode *next; - pointer to the following node in the Unique table union { CUDD_VALUE_TYPE value; - for terminal nodes DdChildren kids; - for non-terminal nodes } type } struct DdChildren { struct DdNode *T; - pointer to the THEN successor struct DdNode *E; - pointer to the ELSE successor } Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

vector:: mapping : variables to levels and vice-versa Shared DDs -representation of multioutput functions -system of functions -functions shared the same nodes -reduction in space Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Strong canonicity -DDs are a canonical representation -One DD corresponds to the only one function and -One function can be represented by only one DD -Conditions: - DD is ordered and reduced - There is no isomorphic nodes Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Unique table -all nodes are stored in table called “Unique table” -Unique table is “hash” based table -Two approaches: - unique table - each variable separate subtable To do: -Choose the good “key” and hash function -Choose the right size of hash table -Influence to the number of “hits” -Depends on the application -Fine tuning of the package performance Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Decision: store the KEY into the node structure or not? -reduce storage memory -avoid repeated calculation of the node KEY Before the generation of the new node we should try to find the same node in the Unique table. -return existing node -generate a new node and insert it into Unique table Key = v + _HASH_KEY(G) + _HASH_KEY(H) + _HASH_KEY(I) + _HASH_KEY(J) + _HASH_KEY(K) PUMA Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Compute table -Avoid repeated calculation -All results are stored in table called “Compute table” -Compute table is “hash” based table -Two approaches: - compute subtables for each operation separately - unique compute table - generic approach (only one operation) -Arguments: - operation - arguments of operation - result Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Before calculation try to find the same operation with the same arguments: - return the existing result - perform the operation and store result into compute table Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Attributed edges -complemented edge -EVBDD (efficient representation of multipliers) Complemented edges - denotes complemented functions - complexity for the operation negation is O(1) - dot at the edge in graph representation - the last bit in pointer to the node: - 0 – denotes noncomplemented function - 1 – denotes complemented function - Reduction in memory up to 20% Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Equivalent Pairs x xx x xx xx Limitation: Position of dots is not arbitrary Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Memory management - limited memory - garbage collection - performed: - automatically (free space less than 20%) - manually - Reference counter used in garbage collection -There are: living nodes (ref. Count >0 ) and dead nodes (ref count. = 0 ) - Garbage collection operation removes the dead nodes out of the unique table Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Good Ordering Bad Ordering Linear GrowthExponential Growth Dynamic reordering - DDs are very sensitive to the variable ordering Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Finding the good variable ordering - very hard problem -A lot of different methods: -exact methods (exponential complexity) -heuristic methods -statistical methods -evolution algorithm based methods -dynamic variable ordering method -Sifting method -Lower-bound sifting method -Etc. - Choose one of the above methods depends on the functions, application, computer resources, etc… - apply automatically or manually Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Dynamic Variable Reordering –Richard Rudell, Synopsys Periodically Attempt to Improve Ordering for All BDDs –Part of garbage collection –Move each variable through ordering to find its best location Has Proved Very Successful –Time consuming but effective –Especially for sequential circuit analysis Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Best Choices Dynamic Reordering By Sifting –Choose candidate variable –Try all positions in variable ordering Repeatedly swap with adjacent variable –Move to best position found Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

b 1 b 1 b 2 b 2 b 2 b 2 efgh ij b 1 b 1 b 2 b 1 b 2 b 1 e f ghij Swapping Adjacent Variables Localized Effect –Add / delete / alter only nodes labeled by swapping variables –Do not change any incoming pointers Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

DDs manipulations Building of DDs Performing binary operation over two DDs Performing transform over DDs Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Boolean Operations on BDDs u v f g Case 1: u and v are terminals. Then resulting graph is a single terminal w: value(w) = value(u) value(v) Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

0 f1f1 Case 2: u and v are non-terminals and index(u) = index(v) = i i f2f2 g1g1 i g2g f 1 g 1 i 1 f 2 g 2 Get these recursively Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

0 f1f1 Case 3: u is a non-terminal, index(u) = i v is either a terminal or index(v) = j > i i f2f2 g1g1 j g2g f 1 g i 1 f 2 g j > i or x x = 0 or 1 APPLY( ) Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Pseudocode for Apply Operation function Apply( F, G ) if ( AlreadyComputed( F, G ) ) return result; else if ( F=={0,1} && G=={0,1} ) return oper( F, G ); else if ( Var( F ) == Var( G ) ) u = CreateNode( Var(F), Apply(Fx’,Gx’), Apply(Fx,Gx)); else if ( Var( F ) < Var( G ) ) u = CreateNode( Var(F), Apply(Fx’,G ), Apply(Fx,G )); else /* if ( Var( F ) > Var( G ) ) */ u = CreateNode( Var(G), Apply(F,Gx’ ), Apply(F,Gx )); InsertComputed( F,G,u ); return u; Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Example: F=ac+bc+d G=ac’+d F+G = ? a d c b 1 0 a c d 10 + A1A1 A2A2 A6A6 A3A3 B1B1 B5B5 B2B2 A4A4 A5A5 B3B3 B4B4 A 1,B 1 A 2,B 2 A 6,B 2 A 3,B 2 A 4,B 3 A 5,B 4 A 6,B 5 A 5,B 2 A 3,B 4 Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

A 1,B 1 A 2,B 2 A 6,B 2 A 3,B 2 A 4,B 3 A 5,B 4 A 6,B 5 A 5,B 2 A 3,B 4 a d c b 1 0 c 11 a d c b 1 0 reduction Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Improvement: APPLY procedure  if-then-else operator ITE Definition: ITE is a binary operator defined by where F,G,H are arbitrary switching functions Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Realization of arbitrary binary operations over BDDs by ITE operator Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Generation of MDDs  Similar as generation of BDDs.  CASE operator instead ITE operator Definition: CASE for q-valued functions is as an operator of q+1 argument as or in form: where Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Direct DDs generation Function represented by cubes or analytical Generate DD for each cube Add contribution of each cube Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

F=[ ] (1X 2), (30 1) Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Transform over DDs -Reed-Muller, Walsh, … Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Symbolic Manipulation with OBDDs Strategy –Represent data as set of OBDDs Identical variable orderings –Express solution method as sequence of symbolic operations –Implement each operation by OBDD manipulation Algorithmic Properties –Arguments are OBDDs with identical variable orderings. –Result is OBDD with same ordering. Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Sample Function Classes Function ClassBestWorstOrdering Sensitivity ALU (Add/Sub)linearexponentialHigh SymmetriclinearquadraticNone MultiplicationexponentialexponentialLow General Experience –Many tasks have reasonable OBDD (or other DDs) representations –Algorithms remain practical for up to 500,000 nodes –Heuristic ordering methods generally satisfactory Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Lower Bound for Multiplication –Bryant, 1991 Integer Multiplier Circuit –n-bit input words A and B –2n-bit output word P Boolean function –Middle bit (n-1) of product Complexity –Exponential OBDD for all possible variable orderings Mult n a0a0 a n-1 b0b0 b n-1 p0p0 p n-1 pnpn p 2n-1 Actual Numbers 40,563,945 BDD nodes to represent all outputs of 16-bit multiplier Grows 2.86x per bit of word size Intractable Function Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Universal DD package At Faculty of electronic engineering Nis (version 1.0) Features: MDD generation for function represented by truth vector or cubes: Generation of the truth-vector of MV function from its DD. Spectrum generation from STDD. Symbolic showing of DD. Arbitrary operation over two MDDs Arbitrary transform over MDD. Some operation over STDD. Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

Conclusions “What do you think about DDs ?” Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004

DDs Logic design problems and the others Athens 2004 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004