DSD Presentation Introduction of Actel FPGA. page 22015/9/11 Presentation Outline  Overview  Actel FPGA Characteristic  Actel FPGA Architecture  Actel.

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Presentation transcript:

DSD Presentation Introduction of Actel FPGA

page 22015/9/11 Presentation Outline  Overview  Actel FPGA Characteristic  Actel FPGA Architecture  Actel FPGA Application

page 32015/9/11 Presentation Introduction To FPGA  FPGA  Field Programmable Gate Array (FPGA)  Programmable Logic Device (PLD)  Development Bias  High Density  High Performance  Low Cost  Low Power  Integrated

page 42015/9/11 Presentation Supplier MMany FPGA suppliers have entered the market over the years  Xilinx  Altera  Lattice  Atmel ctel  ……etc

page 52015/9/11 Presentation Actel  Flash based FPGA  Encryption  Do not need to be configured each time power is applied  Anti-fuse FPGA  one time programmable  Suited using on product line

page 62015/9/11 Presentation Outline  Overview  Actel FPGA Characteristic  Actel FPGA Architecture  Actel FPGA Application

page 72015/9/11 Presentation Actel FPGA Characteristic FFuse vs. Anti-fuse FFlash vs. SRAM

page 82015/9/11 Presentation Actel FPGA Characteristic  Fuse vs. Anti-fuse  Fuse  Resistance changes from Low to High at high current  Programmed only once  Anti-fuse  Resistance changes from High to Low when high voltage  Require a very small area –More connections than others technologies  Programmed only once

page 92015/9/11 Presentation Actel FPGA Characteristic FFuse vs. Anti-fuse FFlash vs. SRAM

page /9/11 Presentation Actel FPGA Characteristic  SRAM  Advantage:  Re-programmable (erasable)  Faster (than Flash)  Disadvantage:  Volatile  Extra ROM  Need time for reading programs from ROM  Poor Information Security

page /9/11 Presentation Actel FPGA Characteristic  Flash  Advantage:  Re-programmable (erasable)  Non-volatile  Information Security  Disadvantage:  Slower (than SRAM)

page /9/11 Presentation Outline  Overview  Actel FPGA Characteristic  Actel FPGA Architecture  Actel FPGA Application

page /9/11 Presentation Actel FPGA Architecture(AX1000)

page /9/11 Presentation Actel Programmable Gate Arrays Rows of programmable logic building blocks + rows of interconnect Anti-fuse Technology: Program Once Use Anti-fuses to build up long wiring runs from short segments

page /9/11 Presentation Actel FPGA Architecture Interconnection Fabric

page /9/11 Presentation Actel FPGA Architecture(C-Cell)

page /9/11 Presentation Actel FPGA Architecture(C-Cell)  C-Cell  Basic multiplexer logic plus more inputs and support for fast carry calculation  Carry connections are “ direct ” and do not require propagation through the programmable interconnect

page /9/11 Presentation Actel FPGA Architecture(R-Cell)

page /9/11 Presentation Actel FPGA Architecture(R-Cell)  R-Cell  Core is D flip-flop  Muxes for altering the clock and selecting an input  Feed back path for current value of the flip-flop for simple hold  Direct connection from one C-cell output of logic module to an R-cell input; Eliminates need to use the programmable interconnect

page /9/11 Presentation Outline  Overview  Actel FPGA Characteristic  Actel FPGA Architecture  Actel FPGA Application

page /9/11 Presentation Actel FPGA Application  Space  Military