Technologies for integrating high- mobility compound semiconductors on silicon for advanced CMOS VLSI Han Yu ELEC5070

Outline 1. Motivation and challenges 2. Integration Techniques Direct epitaxy on silicon Patterned substrate epitaxy Direct wafer bonding Nanowire 3. Conclusion

Why compound semiconductor needed? Si COMS Scaling to limit due to power issues Compound semiconductors with high mobility and small electron effective mass Material Electron Mobility(cm 2 /V∙S ) Electron Effective Mass(m 0 ) Si GaAs

Why on silicon ? Compound semiconductors: 1.No large area substrate 2. Low thermal conductivity 3. High cost Silicon: 1.Large area substrate available 2. High thermal conductivity of Si substrate 3. Low cost and matured technology

Challenges Generate defects

Direct epitaxy on silicon: buffer layers

Patterned substrate epitaxy: aspect ratio trapping

Direct wafer bonding Remember smart cut of SOI?

Nanowires

Conclusion Direct epitaxy on silicon: straight forward but relatively high defects Patterned substrate epitaxy: low defect density but small area Direct wafer bonding: very low defect density requiring very high quality surface Nanowires: lowest defect density but not compatible with conventional planar transistor system

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