Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 CHAPTER 10
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Master Figure
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig. 10.1
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig. 10.2
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig. 10.3
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Figs a, b (a)(b)
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig. 10.5
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Cu Surface Treatment CVD Dielectric Via Lithography and Etch Line Lithography and Etch, TaN barrier Cu CMP TaN Clean Post CMP Clean Cu Electrofill and Anneal PVD Cu Seed Fig. 10.6
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig. 10.7
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig. 10.8
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig. 10.9
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig Resistance (m ), Capacitance (fF), Inductance (pH)
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig Substrate Si Chip Substrate Si Chip Critical failure site - strain concentration Failure sites – no strain concentration
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig Stress Compensation Layer
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig Cr/thin Cu Al/Ni(V)/CuThick CuThick NiCu/Thick Ni UBM Current Crowding Ratio
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Figs a, b, c (a)(b) (c)
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig. 31
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig Current Density Additives Conc.of noble nutal % Ag or % Cu inside Sn
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig Current crowding at solder Less current crowding at solder Passivation UBM Al trace
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig STUD BUMPING COST ,000300,000 BUMPS PER WAFER PRICE PER BUMPED WAFER A B C A:Electroless Ni- Immersion Au B:Solder Plating C:Gold Plating
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Figs a, b (a) (b)
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Si CNT Substrate Solder UBM Substrate Flip and reflow Remove Si for CNT transfer Sputter metal Si Substrate Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig 10.53
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig
Introduction to SYSTEM-ON-PACKAGE(SOP) Miniaturization of the Entire System © 2008 Fig