Instructors: Fu-Chiung Cheng ( 鄭福炯 ) Associate Professor Computer Science & Engineering Tatung University Computer Aided Circuit Design.

Slides:

Advertisements

Similar presentations

컴퓨터구조론 교수 채수환. 교재 Computer Systems Organization & Architecture John D. Carpinelli, 2001, Addison Wesley.

Advertisements

التصميم المنطقي Second Course

Appendix A Logic Circuits. Logic circuits Operate on binary variables that assume one of two distinct values, usually called 0 and 1 Implement functions.

Sequential Logic Latches and Flip-Flops. Sequential Logic Circuits The output of sequential logic circuits depends on the past history of the state of.

Multiplexors Sequential Circuits and Finite State Machines Prof. Sin-Min Lee Department of Computer Science.

CPT 310 Logic and Computer Design Instructor: David LublinerPhone Engineering Technology Dept.Cell

ECE 2373 Modern Digital System Design Exam 2. ECE 2372 Exam 2 Thursday March 5 You may use two 8 ½” x 11” pages of information, front and back, write.

Digital Electronics Course Introduction, Number Systems, Conversion between Bases, and Basic Binary Arithmetic (Lecture #1)

ECE 331 – Digital System Design Flip-Flops and Registers (Lecture #18) The slides included herein were taken from the materials accompanying Fundamentals.

ECE 331 – Digital System Design Introduction to and Analysis of Sequential Logic Circuits (Lecture #20) The slides included herein were taken from the.

Review and Overview. Review  Combinational logic circuit – Decoder, Encoder, Multiplexer, De-multiplexer, Full Adder, Multiplier  Sequential logic circuit.

Useful Things to Know Norm. Administrative Midterm Grading Finished –Stats on course homepage –Pickup after this lab lec. –Regrade requests within 1wk.

ENEE 408C Lab Capstone Project: Digital System Design Spring 2006 Class Web Site:

CS 140L Lecture 9 Professor CK Cheng 6/03/02. transistors modules sequential machine system 1.Adders, Muxes 2.F-Fs and counters 3.Finite State Machine.

ECE 301 – Digital Electronics Introduction to Sequential Logic Circuits (aka. Finite State Machines) and FSM Analysis (Lecture #17)

ECE 331 – Digital Systems Design Introduction to Sequential Logic Circuits (aka. Finite State Machines) and FSM Analysis (Lecture #19)

TDC 311 Digital Logic. Truth Tables  AND  OR  NOT  NAND  NOR  XOR  XNOR.

CSE 378 Computer Hardware Design Prof. Richard E. Haskell – –Tel: –Web site: Follow.

OBJECTIVE OF THIS COURS Digital design is concerned with the design of digital electronic circuits. Digital circuits are employed in the design and construction.

CS 140L Lecture 4 Professor CK Cheng 10/22/02. 1)F-F 2)Shift register 3)Counter (Asynchronous) 4)Counter (Synchronous)

ETE Digital Electronics

Java Programming Language Instructors: Fu-Chiung Cheng ( 鄭福炯 ) Associate Professor Computer Science & Engineering Tatung University

ReVieW Combinational & Sequential Logic Circuit EKT 221 / 4 DIGITAL ELECTRONICS II.

Lecture 1 Combinational Logic Design & Flip Flop 2007/09/07 Prof. C.M. Kyung.

ASIC 120: Digital Systems and Standard-Cell ASIC Design Tutorial 1: Introduction to Digital Circuits October 11, 2005.

Dept. of Computer Science Engineering Islamic Azad University of Mashhad 1 DIGITAL LOGIC CIRCUITS Dept. of Computer Science Engineering Islamic Azad University.

9/15/09 - L27 CountersCopyright Joanne DeGroat, ECE, OSU1 Final Exam Review Exam Time: MONDAY o dark 30 7:30AM this room.

Hardware Design Environment Instructors: Fu-Chiung Cheng ( 鄭福炯 ) Associate Professor Computer Science & Engineering Tatung University.

E&CE % Final 30% Laboratory 20% Midterm ON LINE Course Notes! Lab Manual LabTechs/TAs Assignments extra probs/solns.

40551 Logic Synthesis Optimization Dr. Yaser M. Agami Khalifa Fall 2004 Lecture # 1.

Lecture 4 – State Machine Design 9/26/20081ECE Lecture 4.

3C Technologies & Information Appliances Instructors: Fu-Chiung Cheng ( 鄭福炯 ) Associate Professor Computer Science & Engineering Tatung University

Chapter 2Basic Digital Logic1 Chapter 2. Basic Digital Logic2 Outlines  Basic Digital Logic Gates  Two types of digital logic circuits Combinational.

Instructors: Fu-Chiung Cheng ( 鄭福炯 ) Associate Professor Computer Science & Engineering Tatung University

ACOE361 – Digital Systems Design. Useful information Instructor: Lecturer K. Tatas Office hours: Mo5, Tu3, We6-8, Fri5 Prerequisites: ACOE201 (ACOE161)

Instructors: Fu-Chiung Cheng ( 鄭福炯 ) Associate Professor Computer Science & Engineering Tatung University.

CSE 171 Introduction to Digital Logic and Microprocessors Prof. Richard E. Haskell 115 Dodge Hall.

Digital Logic Design and Lab School of EECS Seoul National University.

Lecture 2 VHDL: Introduction Instructors: Fu-Chiung Cheng ( 鄭福炯 ) Associate Professor Computer Science & Engineering Tatung University.

1 ASIC 120: Digital Systems and Standard-Cell ASIC Design Tutorial 1: Introduction to Digital Circuits January 25, 2006.

Design Methodology Based on VHDL Instructors: Fu-Chiung Cheng ( 鄭福炯 ) Associate Professor Computer Science & Engineering Tatung University.

Computer Architecture and Organization Unit -1. Digital Logic Circuits – Logic Gates – Boolean Algebra – Map Simplification – Combinational Circuits –

Lecture 7 Chap 9: Registers Instructors: Fu-Chiung Cheng ( 鄭福炯 ) Associate Professor Computer Science & Engineering Tatung University.

Jeff Yi CS 147. Circuits  Combinatorial – Circuit that only relies on inputs.  Sequential - Circuit determined by input as well as the previous state.

1 Lecture #11 EGR 277 – Digital Logic Ch. 5 - Synchronous Sequential Logic There are two primary classifications of logic circuits: 1.Combinational logic.

CEC 220 Digital Circuit Design Wednesday, January 7 CEC 220 Digital Circuit Design Slide 1 of 12.

1/11/2016B.Ramamurthy1 Exam #3 Review CSE 241 B.Ramamurthy.

CSE 378 Computer Hardware Design (Formerly, Design of Digital Systems) Prof. Richard E. Haskell – –Tel: –Web site:

Latches and Flip-Flops

CEC 220 Digital Circuit Design Monday, August 24 CEC 220 Digital Circuit Design Slide 1 of 13.

Introduction ELEC 418 Advanced Digital Systems Dr. Ron Hayne Images Courtesy of Thomson Engineering.

Digital Logic Design Basics Combinational Circuits Sequential Circuits Pu-Jen Cheng Adapted from the slides prepared by S. Dandamudi for the book, Fundamentals.

Synthesis Synchronous Sequential Circuits synthesis procedure –Word description of problem /hardest; art, not science/ –Derive state diagram & state table.

Instructors: Fu-Chiung Cheng ( 鄭福炯 ) Associate Professor Computer Science & Engineering Tatung University.

Logic Design Aims: Make students familiar with Boolean algebra, logic design, and logic circuit through lecturing, home work, and lab experiments. Make.

Cpe 252: Computer Organization1 Lo’ai Tawalbeh Lecture #3 Flip-Flops, Registers, Shift registers, Counters, Memory 3/3/2005.

1 Lecture 24 Transistors A look ahead Course summary.

1 COMP541 First Midterm Test Feb 22, :15pmSN006 Vishal will be present.

Modular sequential logic Use latches, flip-flops and combinational logic –Flip-flops usually grouped to form a register Shift registers –n bits {x n …x.

Dept. of Electrical Engineering

Digital Design: With an Introduction to the Verilog HDL, 5e M. Morris Mano Michael D. Ciletti Copyright ©2013 by Pearson Education, Inc. All rights reserved.

Lecture on Digital Logic Design

FIGURE 5.1 Block diagram of sequential circuit

Digital Design Lecture 9

CSE 140 MT 2 Review By Daniel Knapp.

Basics Combinational Circuits Sequential Circuits Ahmad Jawdat

ASIC 120: Digital Systems and Standard-Cell ASIC Design

lecturer | ASIC design engineer

CMPE212 Discussion 11/21/2014 Patrick Sykes

Presentation transcript:

Instructors: Fu-Chiung Cheng ( 鄭福炯 ) Associate Professor Computer Science & Engineering Tatung University Computer Aided Circuit Design

Information: Office: A5-608A Tel. No: Ext Class Lecture will be available on line Textbook: VHDL for Logic Synthesis Andrew Rushton (Wiley 1998) Send an to Mr. Lin if you want to take this course A. name B. Student No. C. . D. Phone No.

Syllabus VHDL (VHSIC Hardware Description Language) A. Language Constructs B. VHDL programs Circuits C. Synopsis CAD tools. D. Xilinx CAD tools. Circuits Design: A. Combinational circuit design B. Sequential circuit design: Synchronous sequential circuit design. Asynchronous sequential circuit design. Place & Route: Xilinx FPGA

Grading Homework Assignments: 40% (4 times). Midterm Exam: 25% Project: 35% A. Proposal. B. Design in VHDL C. Presentation D. Report.

Circuits: Review Circuit Combinational Circuit Sequential Circuit Synchronous Asynchronous

Combinational Circuits: Combinational circuits: The outputs of a system are independent of previous inputs. Examples: A. AND, OR, XOR, NOT, NAND … B. Multiplexer, Demultiplexer, Decoders, ROM,... C. Adder, Multipliers,... Methods to synthesize combinational circuits: A. Karnaugh maps B. Quine-McCluskey C. Boolean Algebra

Combinational Circuit: Name AND OR NOT NAND Symbol ABABAABABABAAB xxxxxxxx Function x=AB x=A+B x=A’ x=(AB)’

Combinational Circuits: 4 to 1 MUX Demux Decoder

Sequential Circuits Sequential circuits: The outputs of a system are dependent of previous inputs. Examples: A. Flip-Flops: SR F/F(latch), Trigger F/F(latch), JK clocked SR F/F, clocked JK F/F B. Counter, Shift Register, Methods to synthesize Sequential Circuits: A. Flow table( State machine)

SR Latch (Asynchronous) S R Q Q’

JK Latch(Asynchronous)

Clocked J-K F/F (Synchronous)

Asynchronous System Combinational Circuit... Latches...

Synchronous System Combinational Circuit... Clocked F/Fs... CK