Computer Architecture Lecture 3: Logical circuits, computer arithmetics Piotr Bilski

Arithmetic-Logical Unit (ALU) Performs arithmetic-logical operations Calculations are performed on the binary system numbers (Boole’s algebra) ALU CU registers state pointers (flags) registers

Number representations Integer numbers: Real numbers: = , = 1, LSB MSB

Integer numbers (fixed point representation) Representation of the unsigned number A: Sign-magnitude representation: Two’s complement (U2):

Examples (sign-magnitude) = = = = double zero representation addition and subtraction requires analysis of signs and magnitudes

Integer systems characteristics Adding the opposite number Additional algorithm Subtraction When signs of the operands are equal and result's opposite Sign and magnitude analysis Overflow Additional bits filled with a sign Additional bits = 0 MSB  sign Increase bits number Two’s complementChange MSBNegation OneTwoZero representations -2 n-1 to 2 n n-1 +1 to 2 n-1 -1Range Two’s complementSign-magnitudeCharacteristics

Arithmetic operations on integers (1) Negation: Sign-magnitude (21) (-21) Two’s complement (21) NEG(21) (-21)

Arithmetic operations on integers (2) Conversion between lengths: Sign-magnitude (21) 8b (21) 16b (-21) (-21) 16b Two’s complements (21) 8b (21) 16b (-21) 8b (-21) 16b

Arithmetic operations on integers (3) Addition: Sign-magnitude (25) (13) (38) (-25) (-13) (-38) (-25) x (13) x NEG(13) (-12) (-12) (-13) x (25) x NEG(25) (12) R NEG(R)

Arithmetic operations on integers (4) Addition: Two’s complements (25) (13) (38) (-25) (-13) (-38) (-25) (13) (-12) (-13) (25)

Arithmetic operations on integers (5) Multiplication Unsigned integers: 0111 (7) 4b 0101 (5) 4b (35) 8b !!

Increasing effectiveness of the multiplication Every partial result can be summed at once (fewer registers!) Multiplying by zero is only bit shifting!

Hardware realization of the unsigned integers multiplication Carry (C) Accumulator (A)

Example of the hardware algorithm’s work C A Q M starting values add shift right move add shift move result

Multiplication in Two’s complement representation Signed integers: 1001 (-7)  multiplier 0011 (3)  multiplicand (-21) Different interpretation of the binary shifting Negative number must be represented in the two’s complement code

Realization of the multiplication in the Two’s complement code –Booth’s algorithm A  0, Q -1  0, LOAD(M, Q) Bit counter = n Right shifting A, Q, Q -1 Bit counter = bit counter - 1 A  A - M A  A + M START Q 0, Q -1 STOP Bit count.=0 YES =01 =10 =11 =00 NO

Example of the Two’s complement code multiplication (7 x 3 operation) A Q Q -1 M starting values subtract shift arithmetically shift arithmetically add shift arithmetically shift arithmetically result

Division of unsigned integers A  0, LOAD(M, Q) Bit counter = n Bit counter = bit counter - 1 Q 0  1 Q 0  0 A  A + M START A < 0? STOP Bit count.=0 YES NO Move A,Q left A  A - M

Division of integers in Two’s complement representation LOAD(A, M, Q) Bit counter = n Bit counter = bit counter - 1 Q 0  0 Q 0  1 START Oper. successful? STOP Bit count.=0 YES NO Move A,Q left A  A - M signs A, M identical? A  A + M NO YES restore A

Example of the Two’s complement representation division (–7/3 operation) A Q M starting values shift left 0010 add restore shift left 0001 add restore shift left 1111 add set Q 0 = shift left 0010 add restore result

Floating point representation Used to represent very small and very large numbers Form the following number: where: m – mantissa c – exponent b - base

Examples 1.24 x 10 7 (1.24e7) 5.82 x x x Format of the 32-bit floating point number: 8 bits 23 bits sign exponent mantissa

Representation of the floating point binary number 1, x 2 20 = x , x 21, , , x 20, ,53125 x 21,0625 0, ,0625 x 20, ,125 x 20,25 0 0,25 x 20,5 1 0,5 x 21,0 0

Representation of the binary floating-point number 1, x 2 20 = x Exponent is a displaced number at 127, so 20 = = 147 (as above)

Normalization of the floating- point number Exponent is changed, so the first mantissa’s digit before the comma was non-zero Because the non-zero number is 1, it does not have to be stored

Range and accuracy of the floating-point numbers For the 32-bit number: Exponent is 8-bit, so range is Mantissa is 23-bit, so accuracy is = 1.2 x We make a compromise between the accuracy and range

Density of the floating point numbers -n 0 n 2n 4n negative overflow positive overflow zero negative underflow positive underflow

Standard IEEE 754 Apllied standard of storing floating point numbers Refers to the 32- i 64-bit numbers Exponent of length, respectively, 8 i 11 bits Default base is 2 Predefined formats for the indirect calculations

Special values in IEEE 754 c = 0, m = 0 – positive or negative zero c = , m = 0 – positive or negative infinity c = 0, m  0 - denormalized number (bit on the left from the comma is zero!) c = , m  0 - NaN

Floating point arithmetics Basic operations:

Addition and subtraction 1.Checking for zeros 2.Equalization of mantissas 3.Adding or subtracting of mantissas 4.Result normalization Example: (123 x 10 0 )+(456 x )=(123 x 10 0 )+(4,56 x 10 0 ) = = 127,56 x 10 0

Multiplying and dividing 1.Checking zeros 2.Adding exponents and subtracting shifted values from the sum 3.Checking for exponent overflow and underflow 4.Multiplication of the mantissas considering signs (sign-magnitude representation!) 5.Rounding and normalization of the multiplication result

Logical structures (1) Basic gates: ABAB Y Y = A AND B ABAB Y A Y Y = A OR B A = NOT Y ABY ABY ABY ABY AY1001AY1001

Logical structures (2) Additional gates: ABAB Y Y = A NAND B ABAB Y Y = A NOR B ABY ABY ABY ABY ABAB Y = A XOR B Y ABY ABY

Logical structures (3) Half-adder ABAB SCSC ABSC ABSC A S B C

Logical structures (4) Adder A S B C A S B C CiABCiAB SCoSCo A B C i S C o

Logical structures (5) 4-bit adder A 0 B 0 A 1 B 1 A 2 B 2 A 3 B 3 0 S 0 S 1 S 2 S 3 C1C1 C2C2 C3C3 C4C4