“CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest.

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Presentation transcript:

“CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest Center of Technological Electronics and Interconnection Techniques - CETTI Ciprian Ionescu

Demonstration in OrCAD The electronic module proposed for demonstration can be used for digitally displaying of voltage or current of an available laboratory power supply.

Schematic 1- Initial data for PCB module design

First of all some words about the working principle of the circuit. First of all some words about the working principle of the circuit. The schematics from fig. 2 will not be used, but it suggests a required intervention in the existing power supply. The schematics from fig. 2 will not be used, but it suggests a required intervention in the existing power supply. The main change is the insertion of the series (shunt) resistor R6. The main change is the insertion of the series (shunt) resistor R6. The connection of the module with the power supply will be assured by the connector pins A-F. The connection of the module with the power supply will be assured by the connector pins A-F.

Working principle (continued) The switch between the U/I display mode is done by the DPDT (Double Pole Double Throw) switch S1 (not included in our PCB). The switch between the U/I display mode is done by the DPDT (Double Pole Double Throw) switch S1 (not included in our PCB). For voltage measurement the voltage applied to IC1 is divided by the group R1-P4 in a quotient 1:100. The decimal point of LD3 and the LED “V” are lit on, the display resolution is 0,1 V. For voltage measurement the voltage applied to IC1 is divided by the group R1-P4 in a quotient 1:100. The decimal point of LD3 and the LED “V” are lit on, the display resolution is 0,1 V. For current measurement the voltage drop at R6, is applied directly at HI-LO terminals of the DAC circuit IC1. In this case there are two possible scale connections (a) - 0  9,99 A or connection (b)- 0  0,999 A. In these cases the shunt resistor must have the values 0.1 , respectively 1 . For current measurement the voltage drop at R6, is applied directly at HI-LO terminals of the DAC circuit IC1. In this case there are two possible scale connections (a) - 0  9,99 A or connection (b)- 0  0,999 A. In these cases the shunt resistor must have the values 0.1 , respectively 1 . The circuit has 4 adjustment points: The circuit has 4 adjustment points: P1 null point adjustment for current domainP1 null point adjustment for current domain P2 full scale calibration for currentP2 full scale calibration for current P3 null point adjustment for voltage domainP3 null point adjustment for voltage domain P4 full scale calibration for voltageP4 full scale calibration for voltage The adjustments must be done in this order.

Demonstration of design flow in OrCAD First of any CAD activity we must find the answer to some questions: How the case (housing) will look like? How the circuit is powered? How many PCBs will be necessary? How many layers will have the PCB? How many connectors we will use? We will use SMD or THT components? Etc. To answer to some of the questions we must see the CAD project as part of a construction project.

FIRST ACTIVITY: Gathering information about components Source: Distributors Catalogue, Producer Data Sheets from Web, etc.

C1 Metalized film capacitor C2,C3 Multilayer ceramic capacitors MCC

C4 Aluminium Electrolytic Capacitor

R1-R5 Metal film resistors P1-P4 Multi Turn Cermet Trimmers

LD1-LD3 7 Segments LED Display D1-D2 LEDs for “Volts” or “Amps” Display

B A Bridge Rectifier

SW1 SPDT Switch J2 In-line pins connectorJ1 Jack female connector

T4, T5 small signal transistors T1- T3 medium power transistors

U2 BCD Decoder U1 A/D Converter

U3 Voltage Regulator

NEXT STEP: Realization of the Schematic Drawing File  New Project

Schematic Page of the module as apears in Capture

Some parts ( symbols) or/and footprints must be created

Preparing Capture for transfer - Properties Editor

The correspondence symbol-footprint (SCM-PCB) at Netlist transfer in Orcad. Recommendation: Use numbers, majority of Layout libraries use numbers. Exceptions: TM_CAP_P, TM_DIODE. Use numbers, majority of Layout libraries use numbers. Exceptions: TM_CAP_P, TM_DIODE. Modify symbols (parts) in libraries not in Schematic Page. Modify symbols (parts) in libraries not in Schematic Page. Take your time and think twice! Take your time and think twice!

TRANSFER TO LAYOUT The field “PCB Footprint” must be filled in (correctly). The field “PCB Footprint” must be filled in (correctly). DRC Verification. DRC Verification. Postprocessing: Netlist, Bill of Materials, Printing. Postprocessing: Netlist, Bill of Materials, Printing. Nets verification - Not a CAD activity!!! Nets verification - Not a CAD activity!!!

File  New Import of Netlist in Layout Block: Technology template Layout file Netlist

Layout screen after import of the Netlist

Establishment of design restrictions: Establishment of design restrictions: board outline no. of layers track widths padstack assignments route spacing Component placement Component placement Routing Routing DRC and final operations DRC and final operations Postprocessing: Gerber and NC Drill files, Printing, Reports Postprocessing: Gerber and NC Drill files, Printing, Reports In LAYOUT Block:

Options  Gerber Settings Options  Post Process Settings POST-PROCESSING

Postprocessing- Top layer Final form of design in Orcad Layout

Postprocessing- Bottom layer Postprocessing- Silk Mask

Postprocessing- Drill Drawing

Postprocessing- Solder Mask Postprocessing- Assembly Drawing

Example of final operations

Thank you for your attention !