/****************************************************** * Josh Schoolcraft * Thomas A Werne ******************************************************/ ~ "authors.h"

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Presentation transcript:

/****************************************************** * Josh Schoolcraft * Thomas A Werne ******************************************************/ ~ "authors.h" 4L, 215C 4,2 All Copyright 2014 California Institute of Technology. Government sponsorship acknowledged.

“If you want to make an apple pie from scratch, you must first create the universe.” 2

\mainpage Intro INSPIRE Architectures Development The Code Reflections 3

\people Communications Networks Instrument Flight Software and Ground Support 4

Copyright 2014 California Institute of Technology. Government sponsorship acknowledged. 5

\INSPIRE Cold-Gas ACS (U. Texas) Processing Board (Tyvak) C&DH Board + Lithium UHF (AstroDev) Deployable Solar Panels (Pumpkin) Structure (JPL) Iris X-Band Radio (JPL) Magnetometer (JPL) Star Tracker (Blue Canyon) X-Band Patch Antennas (JPL) [two sets] ISIS UHF Antenna Overview: Volume: 3U (10x10x30cm) Data Rate: bps Communications: Primary: X-band via DSN Secondary (Receive only): DSS-28 (GAVRT), & Secondary Stations Relay: UHF Science: Magnetometer Camera + Processing Board Guidance and Control: Star Tracker Gyroscope Sun Sensors / Solar Cells Cold-Gas Thrusters 6

\INSPIRE Small project (<$5.5M) with small focused team (core of 9 people) for short mission duration (<90 days) in deep space with redundant spacecraft. Development: 18 months from start to finish Delivered on time and under budget Built on extensive CubeSat experience in low-Earth orbit (personnel, practices, and hardware heritage) Small, skilled, multidisciplinary team Use existing standards (CubeSat Specification, CCSDS, etc.) to reduce design complexity Large margin for mission success based on demonstrated capabilities 7

\requirements Survive Navigate Communicate …Everything else is extra credit… 8

\constraints Time People Hardware …Everything else is secondary… 9

\hardware architecture Texas Instruments MSP430 family Extremely low power (idle current <1µA) Von-Neumann architecture JTAG debug (single-step instructions with full hardware state visibility) Not radiation-hardened (yet) 10

\hardware architecture Initial design: MSP430F1611 Flight Heritage 8MHz, 10KB SRAM, 64KB program storage Final design: MSP430F MHz 8KB SRAM, 116KB Program storage 16-bit architecture with 20-bit addressing Bus Interfaces: I 2 C, SPI, UART 11

Organic approach Start with a minimal, rock-solid “universe” Core real-time operating system “protos” Time Threads Memory protection Cascaded deadline enforcement Establish bus communication Read and track hardware state \software architecture 12

Integrate off-the-shelf ground software AMMOS Mission Data Processing and Control System (AMPCS) Establish mission-specific framework Support tests with increasing complexity Start with peripherals on/off (blinkenlights) End with Operational Readiness Tests (and the mission) \software architecture 13

Pair coding (“rolling peer reviews”) Start from bare metal, add functionality only as needed Expect to write subsystems three times: 1.Prototype 2.First cut 3.Final cut Work with real hardware Write and test in a tight loop End-to-end as much as possible with ground software in the loop Use bug reporting for problems that require discussion and planning Spend time to save time Instrument everything (“Breadcrumbs”), trust nothing Maintain some modularity Automate repetitive tasks Leverage autocoding Build from tables as much as possible Python + YAML (not XML) Simplifiy hardware checkouts Interactive RUSH: Really Useful SHell Merge the CubeSat software development model (amateur code, fast and loose) with guidance from the agile software development, and a helping of skepticism. \development 14

\nutshell Coded ~99% from scratch Multi-threaded RTOS (“protos”) Drivers for 14 hardware devices DSN-conformant telecom library Protocols: AOS, TC, Space Packet, CFDP-1, AX.25 Uplink, downlink, relay FAT32 filesystem Command sequence engine Simultaneous execution Mission modes Science Campaigns Fault Protection engine Attitude control Hotfix patching Ground support tools Umbilical interface Autocoded command and telemetry stubs Patch generator Sequence generator CFDP Depacketizer 15

\codebase C (with C99 initializers): 15,000 lines (cloc) Libraries - Drivers, Filesystem, Telecom: 50% Mission-specific software: 35% Core protos OS: 15% Assembly: 50 lines Stack - register manipulation 20-bit address manipulations Texas Instruments cl430 compiler O2, small_enum, LARGE_CODE_MODEL 100KB binary, including reserved spaces 16

\runtime Stack: 2KB 80% utilization at deepest call depth Four threads, “executive” round-robin scheduler Telecom buffers: 4KB Three multi-protocol I/O interfaces: Two radios + ground umbilical Spacecraft state: 1KB SD card driver: 512B 17

Stable core Breadcrumbs Automation Hardware in the loop Tight write-test-modify loop \critical points 18

“The original software development for the data computer has essentially been a two-man show since 1975, beginning when Edgar M. Blizzard joined Richard Rice to develop the flight version of the code. […] From start to validation to release, their tools were within sight, and certainly hearing […]. Rice characterized the unique nature of the computer data software this way: ‘We didn’t worry about top-down or structured; we just defined functions.’” \parallels -Encyclopedia of Computer Science and Technology Vol. 18 “Computers In Spaceflight: The NASA Experience” 19

^[:q!