DOP - A CPU CORE FOR TEACHING BASICS OF COMPUTER ARCHITECTURE Miloš Bečvář, Alois Pluháček and Jiří Daněček Department of Computer Science and Engineering FEE Czech Technical University in Prague

Presentation Outline Computer Architecture Course Flow at CTU Computer and Logic Design Course Overview of seminars based on DOP Basic features of DOP HW and SW tools available Homework assignments Current experience and future work Conclusions

Undergraduate CA Course Flow Machine – Oriented Languages (x86 asm) Computer and Logic Design Logic Systems Computer Architecture Computer NetworksPeripheral Devices 4 th sem. 5 th sem. 6 th sem. 7 th sem.

Undergraduate CA Courses Computer and Logic Design -introductory computer organization -component based approach (“bottom – up”) -computer arithmetic, datapath components -controller design (hardwired and microprogrammed) -basics of ISA -error check and correction codes Target : Explain basic computer components, sequential CPU datapath and controller.

Undergraduate CA Courses (cont.) Computer Architecture -Quantitative principles of CA (“top-down” approach) -ISA design => RISC -Instruction pipelining (DLX, MIPS) -Basics of ILP (only introduction to superscalar, VLIW, dynamic scheduling) -Memory hierarchy design -Multiprocessor systems (introduction) Some topics covered in specialized courses “Peripheral Devices”, “Computer Networks”

Computer and Logic Design (CLD) Format : units per week (each unit is 45 minutes) 90 minutes lecture + 90 minutes seminar per week 14 weeks per semester

Seminars of CLD Halve of semester is devoted to “educational processor” – currently the processor is DOP The goal is to illustrate the theory from lectures on “real” examples Topics covered by the educational processor - registers, ALU, datapath organization, controller, CPU – memory interaction, basic cycle, interrupt service

Structure of CLD Seminars 1.Explanation of DOP organization in classroom (4 weeks) – “simulation of CPU design” 2. Laboratory seminar with DOP simulator (1 week) 3. Homework – implementation of a new instruction enhancing DOP ISA (solved independently by each student within weeks) 4. Optional seminar with DOP HW emulator board (1 week)

DOP Basic Features 16-bit accumulator-oriented ISA Minimal number of programmer-visible registers : 16-bit W (accumulator), S (source), D (destination), SP (stack pointer), PC (program counter) 8-bit loop counter L, 5 flags (CF, SF, OF, ZF, AF) creates a flags register F, L + F = PSW HW and SW interrupt Variable length encoding (minimize the size of program)

DOP System overview

DOP Datapath

DOP ALU

DOP Microprogramed Controller

DOP Classroom Seminars Explanation of DOP in classroom is useful because it also illustrates : Design flow from ISA to datapath and controller Principles of synchronous design Registers, ALU (computer arithmetic) Datapath organization Alternatives for controller design BUT : They are less interactive, sometimes almost “lecture-like” seminars.

DOP SW and HW tools C compiler SW models and simulators 1. Functional instruction cycle accurate 2. Functional clock cycle accurate – simulates microprogrammed controller 3. RTL VHDL model 4. Post P&R VHDL model with timing HW emulator board - allows DOP implementation and verification

SIMDOP - a Functional Simulator

DOP HW emulator board

Homework Assignment Based on DOP Write a microprogram for DOP implementing some “new instruction” Typical complexity between 10 – 20 microinctructions (clock cycles) Verify your microprogram on SIMDOP Write a report describing the instruction implementation and your experience Optionally verify your homework on HW emulator board

Benefits of Homework Writing of microprograms is useful way how the students can interact with the CPU and computer components It enforces understanding of basic CPU and computer functionality It explains the basic relation between programs, instructions and clock cycles Students claim that they understood the CPU functionality once they did the homework. Are explanatory seminars in the classroom useful ?

Conclusions Microprogramming is used as a method to understand simple CPUs and computers DOP – 16bit accumulator oriented CPU core with microprogrammed controller is used because : - it is simple and easy to explain - it corresponds to introductory level of course - it presents a consistent design which can be used in some simple embedded applications - it can be used as a nice counterexample for pipelining (it is very difficult to pipeline)

Conclusions (cont’.) Several models and tools were developed for supporting DOP New possibilities offers the HW emulator board (design a new component of datapath) Students in advanced design courses can compare DOP with Picoblaze, 8051, AVR and similar FPGA cores DOP can be used as a simple target for writing compilers (for introductory comp. course) Java version of DOP tools is prepared and become available on the internet