DYNAMIC TEST SET SELECTION USING IMPLICATION-BASED ON-CHIP DIAGNOSIS Nicholas Imbriglia, Nuno Alves, Elif Alpaslan, Jennifer Dworak Brown University NATW.

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Presentation transcript:

DYNAMIC TEST SET SELECTION USING IMPLICATION-BASED ON-CHIP DIAGNOSIS Nicholas Imbriglia, Nuno Alves, Elif Alpaslan, Jennifer Dworak Brown University NATW 2010

Motivation  As electronic devices become smaller, they become more and more susceptible to wearout and latent defects:  Time Dependent Dielectric Breakdown (TDDB)  Negative Bias Temperature Instability (NBTI)  Electromigration

Motivation  This susceptibility is application and workload dependent  Large ramifications for the online testing of homogeneous, multi-core architectures  If a core fails, similar cores should be tested

Our Solution  Efficient online error detection  Detect during normal circuit operation  Efficient online testing of homogeneous cores  Test sets short in length  Focus on a small area of the circuit  Multiple detects in this area

Our Solution  We wish to use the diagnostic information inherent to logic implications to target specific sections of a device  We can then develop test sets specially suited for testing these sections online  These test sets, since they focus only on a portion of the device, can be very short and can be run with minimal interruption of the device’s normal operation

Related Work  Online Error Detection  Triple Modular Redundancy  Berger and Bose Lin Coding  Logic Implications  Online Test  Concurrent Autonomous Chip Self-Test Using Stored Test Patterns (CASP)

Logic Implications  Provide valuable diagnostic resolution  The checker hardware requires very little knowledge about the circuit’s current state b = 1 f = 0

Logic Implications  Provide valuable diagnostic resolution  The checker hardware requires very little knowledge about the circuit’s current state sa0 sa1 b = 1 f = 0

Hardware Implementation

High Level Overview

Test Set Selection Process

Generating Pattern Scores  Scores reflect how valuable a pattern is for a given implication  While multiple detections of a fault are useful, we also wish to promote patterns that allow for full coverage of the faults detectable by an implication

Step #1: Fault Dictionary and Implication Table Test Pattern # Faults a stuck-at a stuck-at b stuck-at b stuck-at c stuck-at c stuck-at d stuck-at d stuck-at e stuck-at e stuck-at f stuck-at f stuck-at g stuck-at g stuck-at h stuck-at h stuck-at i stuck-at i stuck-at Implication # 012 Faults a stuck-at 0010 a stuck-at 1001 b stuck-at 0010 b stuck-at 1001 c stuck-at 0100 c stuck-at 1010 d stuck-at 0010 d stuck-at 1001 e stuck-at 0010 e stuck-at 1100 f stuck-at 0100 f stuck-at 1001 g stuck-at 0001 g stuck-at 1010 h stuck-at 0100 h stuck-at 1010 i stuck-at 0001 i stuck-at 1010

Step #2: Select the Implication Test Pattern # Faults a stuck-at a stuck-at b stuck-at b stuck-at c stuck-at c stuck-at d stuck-at d stuck-at e stuck-at e stuck-at f stuck-at f stuck-at g stuck-at g stuck-at h stuck-at h stuck-at i stuck-at i stuck-at Implication # 012 Faults a stuck-at 0010 a stuck-at 1001 b stuck-at 0010 b stuck-at 1001 c stuck-at 0100 c stuck-at 1010 d stuck-at 0010 d stuck-at 1001 e stuck-at 0010 e stuck-at 1100 f stuck-at 0100 f stuck-at 1001 g stuck-at 0001 g stuck-at 1010 h stuck-at 0100 h stuck-at 1010 i stuck-at 0001 i stuck-at 1010

Test Pattern # Faults a stuck-at a stuck-at b stuck-at b stuck-at c stuck-at c stuck-at d stuck-at d stuck-at e stuck-at e stuck-at f stuck-at f stuck-at g stuck-at g stuck-at h stuck-at h stuck-at i stuck-at i stuck-at Implication # 012 Faults a stuck-at 0010 a stuck-at 1001 b stuck-at 0010 b stuck-at 1001 c stuck-at 0100 c stuck-at 1010 d stuck-at 0010 d stuck-at 1001 e stuck-at 0010 e stuck-at 1100 f stuck-at 0100 f stuck-at 1001 g stuck-at 0001 g stuck-at 1010 h stuck-at 0100 h stuck-at 1010 i stuck-at 0001 i stuck-at 1010 Step #2: Select the Implication Test Pattern # Faults a stuck-at b stuck-at c stuck-at d stuck-at e stuck-at g stuck-at h stuck-at i stuck-at

Step #3: Calculate Scores Test Pattern # # of DetectsFault Values Faults a stuck-at a stuck-at b stuck-at b stuck-at c stuck-at c stuck-at d stuck-at d stuck-at Pattern Scores

Step #4: Pick the Pattern with the Highest Score Test Pattern # # of DetectsFault Values Faults a stuck-at a stuck-at b stuck-at b stuck-at c stuck-at c stuck-at d stuck-at d stuck-at Pattern Scores

Step #3 (again): Calculate Scores Test Pattern # # of DetectsFault Values Faults a stuck-at a stuck-at b stuck-at b stuck-at c stuck-at c stuck-at d stuck-at d stuck-at Pattern Scores

Step #3 (again): Calculate Scores Test Pattern # # of DetectsFault Values Faults a stuck-at a stuck-at b stuck-at b stuck-at c stuck-at c stuck-at d stuck-at d stuck-at Pattern Scores

Implication Assignment Table

Experimental Setup

Experimental Results

Stuck-At Fault Detections

Transition Fault Detections

Experimental Results

Conclusion  We have formulated a procedure for extracting diagnostic information from logic implications  This information was then used to target a specific area of the circuit that is suspected of having an error  Narrowing down the possible locations of an error allowed for the creation of very small, highly specialized test sets

Future Work  Additional work could be done to narrow down the suspected sites even further  A given pattern will only detect a subset of the faults covered by an implication  The results of running patterns could further pinpoint a fault’s location