Computer Architecture – CSC 345 Dr. Robert Fisher —Office Hours: TTh – 11:00-11:45. Also after class. —Office: CSTI 607 — Course Web Page — Text —Computer Organization & Architecture –Designing for Performance, Sixth Edition,2003 –William Stallings –ISBN
Architecture & Organization Architecture refers to those attributes of a computer visible to the programmer —Instruction set, number of bits used for data representation, I/O mechanisms, addressing techniques. —e.g. Is there a multiply instruction? Organization refers to how the features are implemented —Control signals, interfaces, memory technology. —e.g. Is there a hardware multiply unit or is it done by repeated addition?
Architecture & Organization All Intel x86 family share the same basic architecture The IBM System/370 family share the same basic architecture This gives code compatibility —At least backwards Organization differs between different versions
Structure & Function Structure is the way in which components relate to each other Function is the operation of individual components as part of the structure
Function In general terms, there are only four computer functions: —Data processing —Data storage —Data movement —Control
Functional view
Operations (1) Data movement
Operations (2) Storage
Operation (3) Processing from/to storage
Operation (4) Processing from storage to I/O
Structure - Top Level Computer Main Memory Input Output Systems Interconnection Peripherals Communication lines Central Processing Unit Computer
Structure - The CPU Computer Arithmetic and Login Unit Control Unit Internal CPU Interconnection Registers CPU I/O Memory System Bus CPU
Structure - The Control Unit CPU Control Memory Control Unit Registers and Decoders Sequencing Login Control Unit ALU Registers Internal Bus Control Unit
Internet Resources - Web site for book —links to sites of interest —links to sites for courses that use the book —errata list for book —information on other books by W. Stallings —Math —How-to —Research resources —Misc
ENIAC - background Electronic Numerical Integrator And Computer Eckert and Mauchly University of Pennsylvania Trajectory tables for weapons Started 1943 Finished 1946 —Too late for war effort Used until 1955
ENIAC - details Decimal (not binary) 20 accumulators of 10 digits Programmed manually by switches 18,000 vacuum tubes 30 tons 15,000 square feet 140 kW power consumption 5,000 additions per second
von Neumann/Turing Stored Program concept Main memory storing programs and data ALU operating on binary data Control unit interpreting instructions from memory and executing Input and output equipment operated by control unit Princeton Institute for Advanced Studies —IAS Completed 1952
Structure of von Neumann machine
IAS - details 1000 x 40 bit words —Binary number —2 x 20 bit instructions Set of registers (storage in CPU) —Memory Buffer Register —Memory Address Register —Instruction Register —Instruction Buffer Register —Program Counter —Accumulator —Multiplier Quotient
IAS Instruction Set
Structure of IAS – detail
Commercial Computers Eckert-Mauchly Computer Corporation UNIVAC I (Universal Automatic Computer) US Bureau of Census 1950 calculations Became part of Sperry-Rand Corporation Late 1950s - UNIVAC II —Faster —More memory
IBM Punched-card processing equipment the 701 —IBM’s first stored program computer —Scientific calculations the 702 —Business applications Lead to 700/7000 series
Transistors Replaced vacuum tubes Smaller Cheaper Less heat dissipation Solid State device Made from Silicon (Sand) Invented 1947 at Bell Labs William Shockley et al.
Transistor Based Computers Second generation machines NCR & RCA produced small transistor machines IBM 7000 DEC —Produced PDP-1
IBM 700/7000 Series
Microelectronics Literally - “small electronics” A computer is made up of gates, memory cells and interconnections These can be manufactured on a semiconductor e.g. silicon wafer
Generations of Computer Vacuum tube Transistor Small scale integration on —Up to 100 devices on a chip Medium scale integration - to 1971 —100-3,000 devices on a chip Large scale integration —3, ,000 devices on a chip Very large scale integration to date —100, ,000,000 devices on a chip Ultra large scale integration —Over 100,000,000 devices on a chip
Moore’s Law Increased density of components on chip Gordon Moore - cofounder of Intel Number of transistors on a chip will double every year Since 1970’s development has slowed a little —Number of transistors doubles every 18 months Cost of a chip has remained almost unchanged Higher packing density means shorter electrical paths, giving higher performance Smaller size gives increased flexibility Reduced power and cooling requirements Fewer interconnections increases reliability
Growth in CPU Transistor Count
IBM 360 series 1964 Replaced (& not compatible with) 7000 series First planned “family” of computers —Similar or identical instruction sets —Similar or identical O/S —Increasing speed —Increasing number of I/O ports (i.e. more terminals) —Increased memory size —Increased cost Multiplexed switch structure
DEC PDP First minicomputer (after miniskirt!) Did not need air conditioned room Small enough to sit on a lab bench $16,000 —$100k+ for IBM 360 Embedded applications & OEM BUS STRUCTURE
DEC - PDP-8 Bus Structure OMNIBUS Console Controller CPU Main Memory I/O Module I/O Module
Semiconductor Memory 1970 Fairchild Size of a single core —i.e. 1 bit of magnetic core storage Holds 256 bits Non-destructive read Much faster than core Capacity approximately doubles each year
Intel —First microprocessor —All CPU components on a single chip —4 bit Followed in 1972 by 8008 —8 bit —Both designed for specific applications —Intel’s first general purpose microprocessor
Speeding it up Pipelining On board cache On board L1 & L2 cache Branch prediction Data flow analysis Speculative execution
Performance Mismatch Processor speed increased Memory capacity increased Memory speed lags behind processor speed
DRAM and Processor Characteristics
Trends in DRAM use
Solutions Increase number of bits retrieved at one time —Make DRAM “wider” rather than “deeper” Change DRAM interface —Cache Reduce frequency of memory access —More complex cache and cache on chip Increase interconnection bandwidth —High speed buses —Hierarchy of buses
Pentium Evolution (1) 8080 —first general purpose microprocessor —8 bit data path —Used in first personal computer – Altair 8086 —much more powerful —16 bit —instruction cache, prefetch few instructions —8088 (8 bit external bus) used in first IBM PC —16 Mbyte memory addressable —up from 1Mb —32 bit —Support for multitasking
Pentium Evolution (2) —sophisticated powerful cache and instruction pipelining —built in maths co-processor Pentium —Superscalar —Multiple instructions executed in parallel Pentium Pro —Increased superscalar organization —Aggressive register renaming —branch prediction —data flow analysis —speculative execution
Pentium Evolution (3) Pentium II —MMX technology —graphics, video & audio processing Pentium III —Additional floating point instructions for 3D graphics Pentium 4 —Note Arabic rather than Roman numerals —Further floating point and multimedia enhancements Itanium —64 bit —see chapter 15 See Intel web pages for detailed information on processors
Program Concept Hardwired systems are inflexible General purpose hardware can do different tasks, given correct control signals Instead of re-wiring, supply a new set of control signals
What is a program? A sequence of steps For each step, an arithmetic or logical operation is done For each operation, a different set of control signals is needed
Function of Control Unit For each operation a unique code is provided —e.g. ADD, MOVE A hardware segment accepts the code and issues the control signals We have a computer!
Components The Control Unit and the Arithmetic and Logic Unit constitute the Central Processing Unit Data and instructions need to get into the system and results out —Input/output Temporary storage of code and results is needed —Main memory
Computer Components: Top Level View
Instruction Cycle Two steps: —Fetch —Execute
Fetch Cycle Program Counter (PC) holds address of next instruction to fetch Processor fetches instruction from memory location pointed to by PC Increment PC —Unless told otherwise Instruction loaded into Instruction Register (IR) Processor interprets instruction and performs required actions
Execute Cycle Processor-memory —data transfer between CPU and main memory Processor I/O —Data transfer between CPU and I/O module Data processing —Some arithmetic or logical operation on data Control —Alteration of sequence of operations —e.g. jump Combination of above
Example of Program Execution
Instruction Cycle - State Diagram