VLSI Arithmetic Adders & Multipliers Prof. Vojin G. Oklobdzija University of California
Oklobdzija 2004Computer Arithmetic2 Introduction Digital Computer Arithmetic belongs to Computer Architecture, however, it is also an aspect of logic design. The objective of Computer Arithmetic is to develop appropriate algorithms that are utilizing available hardware in the most efficient way. Ultimately, speed, power and chip area are the most often used measures, making a strong link between the algorithms and technology of implementation.
Oklobdzija 2004Computer Arithmetic3 Basic Operations Addition Multiplication Multiply-Add Division Evaluation of Functions Multi-Media
Addition of Binary Numbers
Oklobdzija 2004Computer Arithmetic5 Addition of Binary Numbers Full Adder. The full adder is the fundamental building block of most arithmetic circuits: The sum and carry outputs are described as: Full Adder C in C out sisi aiai bibi
Oklobdzija 2004Computer Arithmetic6 Addition of Binary Numbers Propagate Generate InputsOutputs cici aiai bibi sisi c i
Oklobdzija 2004Computer Arithmetic7 Full-Adder Implementation Full Adder operations is defined by equations: One-bit adder could be implemented as shown Carry-Propagate: and Carry-Generate g i
Oklobdzija 2004Computer Arithmetic8 High-Speed Addition One-bit adder could be implemented more efficiently because MUX is faster
Oklobdzija 2004Computer Arithmetic9 The Ripple-Carry Adder
Oklobdzija 2004Computer Arithmetic10 The Ripple-Carry Adder From Rabaey
Oklobdzija 2004Computer Arithmetic11 Inversion Property From Rabaey
Oklobdzija 2004Computer Arithmetic12 Minimize Critical Path by Reducing Inverting Stages From Rabaey
Oklobdzija 2004Computer Arithmetic13 Ripple Carry Adder Carry-Chain of an RCA implemented using multiplexer from the standard cell library: Critical Path Oklobdzija, ISCAS’88
Oklobdzija 2004Computer Arithmetic14 Manchester Carry-Chain Realization of the Carry Path Simple and very popular scheme for implementation of carry signal path
Oklobdzija 2004Computer Arithmetic15 Original Design T. Kilburn, D. B. G. Edwards, D. Aspinall, "Parallel Addition in Digital Computers: A New Fast "Carry" Circuit", Proceedings of IEE, Vol. 106, pt. B, p. 464, September 1959.
Oklobdzija 2004Computer Arithmetic16 Manchester Carry Chain (CMOS) Kilburn, et al, IEE Proc, Implement P with pass-transistors Implement G with pull-up, kill (delete) with pull-down Use dynamic logic to reduce the complexity and speed up
Oklobdzija 2004Computer Arithmetic17 Pass-Transistor Realization in DPL
Oklobdzija 2004Computer Arithmetic18 Carry-Skip Adder MacSorley, Proc IRE 1/61 Lehman, Burla, IRE Trans on Comp, 12/61
Oklobdzija 2004Computer Arithmetic19 Carry-Skip Adder Bypass From Rabaey
Oklobdzija 2004Computer Arithmetic20 Carry-Skip Adder: N-bits, k-bits/group, r=N/k groups
Oklobdzija 2004Computer Arithmetic21 Carry-Skip Adder k
Oklobdzija 2004Computer Arithmetic22 Variable Block Adder (Oklobdzija, Barnes: IBM 1985)
Oklobdzija 2004Computer Arithmetic23 Carry-chain of a 32-bit Variable Block Adder (Oklobdzija, Barnes: IBM 1985)
Oklobdzija 2004Computer Arithmetic24 Carry-chain of a 32-bit Variable Block Adder (Oklobdzija, Barnes: IBM 1985) =9 Any-point-to-any-point delay = 9 as compared to 12 for CSKA
Oklobdzija 2004Computer Arithmetic25 Carry-chain block size determination for a 32-bit Variable Block Adder (Oklobdzija, Barnes: IBM 1985)
Oklobdzija 2004Computer Arithmetic26 Delay Calculation for Variable Block Adder (Oklobdzija, Barnes: IBM 1985) Delay model:
Oklobdzija 2004Computer Arithmetic27 Variable Block Adder (Oklobdzija, Barnes: IBM 1985) Variable Group Length Oklobdzija, Barnes, Arith’85
Oklobdzija 2004Computer Arithmetic28 Carry-chain of a 32-bit Variable Block Adder (Oklobdzija, Barnes: IBM 1985) Variable Block Lengths No closed form solution for delay It is a dynamic programming problem
Oklobdzija 2004Computer Arithmetic29 Delay Comparison: Variable Block Adder (Oklobdzija, Barnes: IBM 1985)
Oklobdzija 2004Computer Arithmetic30 Delay Comparison: Variable Block Adder VBA- Multi-Level CLA VBA