Power Supply Aware Computing Pradeep S. Shenoy and Philip T. Krein Support provided by National Science Foundation under Grant ECS and by the Grainger Center for Electric Machinery and Electromechanics. Special thanks to V. Bora and M. Sweeney for their assistance in this work.

Microprocessor Supply Requirements Low voltage, high current Large load (current) steps Tight voltage band Desire high supply efficiency over a wide load range Parameter Value Supply voltage (V dd ) ~1 V Max continuous load current (I dd ) 130 A Max load current 150 A Max load current step 120 A Max current slew rate 300 A/µs Max voltage overshoot 50 mV Max overshoot duration 25 µs Supply output capacitance ~ 2500 µF Intel VRM/EVRD Design Guidelines

Microprocessor Voltage Regulator Buck Converter (voltage regulator) Inductor and capacitor state equation In steady state During a load transient, the capacitor must provide the difference between i L and i load → output voltage deviates Large output capacitance Slew rate limited by the inductor → low inductance

Minimum Time Control Also called time optimal control Minimum time physically possible to move from one operating point to another One switch action Fixed converter topology Minimum time response to load step increase

Augmented Buck Converter Buck converter augmented with additional energy paths Load transient response of an augmented buck converter

Microprocessor Informs Power Supply Basic information –VID (V dd reference) –Status indicators Load step information –Timing –Size Improving performance decreases output capacitance needs An example of information provided to the power supply

Power Supply Informs Microprocessor Microprocessor activity level determined by power supply state Request increase or decrease load level Eliminate voltage fluctuations Reduce energy consumption, cost, size, etc. An example of information provided to the microprocessor

Other Considerations Communication overhead –Processor pins –Protocol –Sampling rate –Accuracy of information Impact on computational speed? Error resilience? Augmented buck converter

Experimental Results Augmented buck converter voltage regulation Expanded load step down in an augmented buck converter 12 V input, 5 V output, 60% load steps I dd I aughi V dd ILIL I auglow V dd ILIL

Comparison for Load Step Down Augmented buck converter response Traditional buck converter with minimum time control 12 V input, 5 V output, 60% load step ILIL ILIL I dd I auglow V dd

Conclusions Challenging performance specs for voltage regulators Power supply and microprocessor can communicate Communication and computational overhead Potential savings in energy, cost, and size Questions or comments?

Ideal Sources Ideal voltage sourceIdeal current source Fixed voltage, any current, Infinite bandwidth Fixed current, any voltage Infinite bandwidth

Minimum Time Control Also called time optimal control Minimum time physically possible for converter states to move from one operating point to another One switch action Fixed converter topology V out (200 mV/div) I L (2 A/div) I load (2 A/div) Y Axis: I L (1 A/div) X Axis: V out (100 mV/div) State plane representation

Augmented Buck Converter Desire an ideal voltage source – fixed voltage, any current Add energy paths that can supply or sink energy during a change in the load (not in steady state) Capacitor current remains zero; output voltage constant Augmented Buck Converter Energy can be added or removed in augmentation branches

Load Transient Response Time domain response to load step at t 1, augmented converter reaches steady state at t 2, minimum time control reaches steady state at t 3 State plane trajectories with minimum time control and converter augmentation