Program Control Instructions:

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Presentation transcript:

Program Control Instructions: Using RSLogix 500 Software

Why these skills are important: Program control instructions allow you to change the order in which the processor scans a ladder program. These instructions are used to minimize scan time, create a more efficient program, and troubleshoot a ladder logic program.

Program Control Instructions: Input and output instructions that, when used together, change how and where an SLC 500 processor scans. Program control instructions dictate the sequence in which the program is executed, thereby interrupting the normal sequence of the processor operating cycle.

Processor Operating Cycle & Program Control Instructions: The following graphic provides a review of how the processor operating cycle, without program control instructions, is divided:

Common Program Control Instructions: The following program control instructions are commonly used:

Jump to Label (JMP) & Label (LBL) Instructions: Jump to Label (JMP) Instructions: An output instruction that directs the processor to skip rungs (forward or backward). Label (LBL) Instruction: An input instruction that is the target of JMP instructions having the same label number. JMP and LBL instructions are used in pairs to skip portions (zones) of the ladder program, which reduces scan time. Zone: a section of ladder logic.

The following graphic shows examples of single and multiple JMP instructions:

When the JMP rung is true: The program skips from the rung containing the JMP instruction to the rung containing the designated LBL instructions. The program continues executing. The zone rungs between the JMP and LBL instructions are not executed. The zone outputs remain in their last state.

When the JMP rung is false: The program does not execute the JMP instruction. The zone rungs will be executed. The zone outputs function normally. The condition of the JMP rung has no effect on rungs outside the zone.

Subroutine: A program file that performs a specific task. Jump to Subroutine (JSR), Subroutine (SBR), and Return from Subroutine (RET) Instructions: Subroutine: A program file that performs a specific task. A subroutine will interrupt the program scan based on the specified instruction. For SLC 500 processors, program files 3 to 255 are designated for subroutines.

Subroutine are used in the following situations: Loading a recipe Performing a calculation Cleaning a vat Purging a system Emptying a tank Packing and sealing a carton The following graphic represents subroutines in a processor operating cycle:

Jump to Subroutine (JSR): An output instruction that directs the controller to jump to a targeted subroutine file. Subroutine (SBR): An input instruction that marks the beginning of a subroutine. Return (RET): An output instruction that marks the end of a subroutine execution or the end of the subroutine file.

JSR and SBR instructions are used together to direct the processor to execute a separate subroutine file within the ladder logic program. The RET instruction causes the processor to resume program execution in the program file that called the subroutine. Program execution continues at the instruction following the JSR instruction where it exited the program. The following graphic shows the instructions used to execute a subroutine file:

Nested Subroutine File: A subroutine that directs program execution to another subroutine.

Master Control Reset Instruction: An output instruction that, when used in pairs, defines program zones where all non-retentive outputs may be disabled at the same time for the same length of time. Rungs within the MCR zone are still scanned, but scan time is reduced due to the false state of non-retentive outputs. The true and false states for MCR instructions are summarized in the following table:

Master Control Reset (MCR) Instruction: Non-Retentive Outputs and the MCR Instruction: Non-retentive outputs reset when rung conditions go false; retentive outputs do not. MCR instructions turn off all non-retentive outputs in a section of ladder logic. Examples of non-retentive and retentive outputs are shown in the following graphic:

Keep these points in mind when interpreting MCR instructions: The MCR instruction is not a substitute for a hard-wired master control relay that provides emergency stop capability. TOF timers will activate when placed inside of a false MCR zone. If an unmatched MCR instruction exists in the project, the END instruction is used to mark the end of the MCR zone.

Temporary End (TND) Instruction: An output instruction that controls the scanning operation of a processor. When the logic preceding this output instruction is true, the TND: Stops the processor from scanning the rest of the program file. Updates the I/O Resumes scanning at rung 0 of the main program. If this instruction rung is false, the processor continues the scan until the next TND instruction or the END statement.

Suspend (SUS) Instruction: An output instruction that causes a processor to enter the suspend idle mode and stores a suspend ID number in word 7 (S:7) of the status file. All outputs are de-energized. This instruction can be used to identify specific conditions for program debugging and system troubleshooting.

Interpreting Jump to Label (JMP) and Label (LBL) Instructions:

Interpreting Jump to Subroutine (JSR), Subroutine (SBR), and Return from Subroutine (RET) Instructions: The following graphic shows an example of JSR, SBR, and RET instructions.

Interpreting Master Control Reset (MCR) Instructions: The following graphic shows an example of an MCR instruction. When pushbuttons 5, 8, and 9 are pressed, coils 6 and 8 are energized and the T4:6 timer begins timing. When the pushbutton 7 is pressed, the MCR zone is activated. Coil 8 is de-energized, and the TON timer stops timing. Coil 6 remains on because it is a retentive output. The T4:7 timer begins timing.

Interpreting Temporary End (TND) Instructions: The following graphic shows an example of a TND instruction. In the example, note the following: When switch 10 is closed, the TND instruction stops the processor from scanning the rest of the program file. I/O is updated, and the processor resumes scanning at rung 0 of the main program file.

Interpreting Suspend (SUS) Instructions: The following graphic shows an example of an SUS instruction. In the example, note the following: When switch 15 is closed and the value in N7:0 is greater than or equal to 75, the processor is placed in the Suspend Idle Mode. The suspend ID is placed in word S:7 of the processor status file. All outputs are de-energized.