سنتز کننده های فرکانس و کاربرد ان در مدارهای بازيابي داده Advanced Frequency Synthesizers and its application in data recovery

سر فصلهاي درس Chapter 1: Frequency synthesizers and its applications Chapter 2: System Level Overview of Integer N- PLL (INPLL) Chapter 3: General Architectures of Frequency synthesizers ) Chapter 4: Description of PLL components and circuit implementations Chapter 5: Fractional N-PLL(FNPLL) Chapter 6: Direct Digital Synthesizer Chapter 7: Adaptive PLL and other PLLs Chapter 8: Clock and Data Recovery System . Chapter 9: PLL Test and Simulation

منابع و مراجع پیشنهادی Wireless CMOS Frequency Synthesizers Design, J. Chaninckx & M. Steyaert Design of Integrated Circuits for Optical Communications, Behzad Razavi The Design of CMOS Radio-Frequency Integrated Circuits, Thomas Lee RF Microelectronics, Behzad Razavi, Prentice Hall Phase lock loop Techniques. Floyd M, Gardner, 2005, wiley-Intersciense  

نحوه ارزيابي درس امتحان پايان ترم 10 نمره تکليف شماره 1 3 نمره تکليف شماره 2 3 نمره پروژه و سمينار 6 نمره

Frequency synthesis(FS) is electronic system which generate periodic waveform. The goal is to analyze and design FS in integrated circuit level. Most of designs are discussed in CMOS and rarely in BiCMOS and Bipolar(SiGe). FR also called Phase-lock-loop too(PLL).

Apllication Wireless application Data link application Skew Cancellation Clock and Data Recovery

Frequency Synthesis (e.g. generating a 1 GHz clock from a 100 MHz reference) • Skew Cancellation (e.g. phase-aligning an internal clock to the IO clock) (May use a DLL instead) • Extracting a clock from a random data stream (e.g. serial-link receiver)

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Tuning Range muts be able to cover all channels Purity of the output tone: Low phase noise or jitter Freedom from spurs Amplitude must be enough to drive mixers Step size should not be more than channel spacing

Settling time must be below a certain amount when channel is changed. Acquisition time must be low enough to start FR very fast. I and Q Maching Power dissipation Synthesizer pulling(chirp) must low when other blocks turn on.

Data Link Application

Intersymbol interference

High Pass filtering and DC wandering

Optical System=10Gb/s High pass corner frequency =250KHz What is the longest run befor 0.2dB

M=147