Quine-McCluskey Computer Organization I 1 March 2010 ©2008-10 McQuain Introduction Recall that the procedure we've seen for forming a Boolean function.

Slides:



Advertisements
Similar presentations
Techniques for Combinational Logic Optimization
Advertisements

Minimization of Circuits
Digital Circuits.
Combinational Circuits ENEL 111. Common Combinationals Circuits NAND gates and Duality Adders Multiplexers.
K-Map Simplification COE 202 Digital Logic Design Dr. Aiman El-Maleh
ECE 3110: Introduction to Digital Systems Simplifying Sum of Products using Karnaugh Maps.
Quine-McCluskey (Tabular) Minimization  Two step process utilizing tabular listings to:  Identify prime implicants (implicant tables)  Identify minimal.
KARNAUGH MAP Introduction Strategy for Minimization Minimization of Product-of-Sums Forms Minimization of More Complex Expressions Don't care Terms 1.
Gate-level Minimization
Building an Computer Adder. Building an Adder No matter how complex the circuit, or how complex the task being solved, at the base level, computer circuits.
ENGIN112 L13: Combinational Design Procedure October 1, 2003 ENGIN 112 Intro to Electrical and Computer Engineering Lecture 13 Combinational Design Procedure.
Example: Given a 4-bit input combination N=N 3 N 2 N 1 N 0, this function produces a 1 output for N=1,2,3,5,7,11,13, and 0 otherwise.  According to the.
CS 151 Digital Systems Design Lecture 13 Combinational Design Procedure.

Computer Engineering (Logic Circuits) (Karnaugh Map)
Logic gate level Part 3: minimizing circuits. Improving circuit efficiency Efficiency of combinatorial circuit depends on number & arrangement of its.
Overview Part 2 – Circuit Optimization 2-4 Two-Level Optimization
11.1 Boolean Functions. Boolean Algebra An algebra is a set with one or more operations defined on it. A boolean algebra has three main operations, and,
Digital Logic Lecture 08 By Amr Al-Awamry. Combinational Logic 1 A combinational circuit consists of an interconnection of logic gates. Combinational.
Digital Logic Design Lecture # 7 University of Tehran.
Chapter 3.5 Logic Circuits. How does Boolean algebra relate to computer circuits? Data is stored and manipulated in a computer as a binary number. Individual.
Department of Computer Engineering
Eng. Mohammed Timraz Electronics & Communication Engineer University of Palestine Faculty of Engineering and Urban planning Software Engineering Department.
ADDERS Half Adders Recall that the basic rules of binary addition are as indicated below in Table 2-9. A circuit known as the half-adder carries out these.
Chapter 10 (Part 2): Boolean Algebra  Logic Gates (10.3) (cont.)  Minimization of Circuits (10.4)
1 Digital Logic Design Week 5 Simplifying logic expressions.
1 © 2015 B. Wilkinson Modification date: January 1, 2015 Designing combinational circuits Logic circuits whose outputs are dependent upon the values placed.
Digital Logic Computer Organization 1 © McQuain Logic Design Goal:to become literate in most common concepts and terminology of digital.
Two-Level Simplification Approaches Algebraic Simplification: - algorithm/systematic procedure is not always possible - No method for knowing when the.
Logic Gates Logic gates are electronic digital circuit perform logic functions. Commonly expected logic functions are already having the corresponding.
ECE 2110: Introduction to Digital Systems PoS minimization Don’t care conditions.
ECE 3110: Introduction to Digital Systems Symplifying Products of sums using Karnaugh Maps.
Computer Organization CSC 405 Quine-McKluskey Minimization.
Two Level Networks. Two-Level Networks Slide 2 SOPs A function has, in general many SOPs Functions can be simplified using Boolean algebra Compare the.
Circuit Minimization. It is often uneconomical to realize a logic directly from the first logic expression that pops into your head. Canonical sum and.
CMPUT Computer Organization and Architecture II1 CMPUT329 - Fall 2003 Topic 5: Quine-McCluskey Method José Nelson Amaral.
1 Quine-McCluskey Method. 2 Motivation Karnaugh maps are very effective for the minimization of expressions with up to 5 or 6 inputs. However they are.
Computer Engineering (Logic Circuits) (Karnaugh Map)
Chapter3: Gate-Level Minimization Part 1 Origionally By Reham S. Al-Majed Imam Muhammad Bin Saud University.
CS1Q Computer Systems Lecture 7
XOR Operator A short digression… … to introduce another Boolean operation: exclusive- OR (XOR) ABA + B XOR.
Lecture 11 Combinational Design Procedure
ECE 3110: Introduction to Digital Systems Chapter #4 Review.
Computer Science 101 More Devices: Arithmetic. From 1-Bit Equality to N-Bit Equality = A B A = B Two bit strings.
CS151 Introduction to Digital Design Chapter Map Simplification.
Sum-of-Products (SOP)
June 12, 2002© Howard Huang1 Karnaugh maps Last time we saw applications of Boolean logic to circuit design. – The basic Boolean operations are.
Logic Simplification-Using K-Maps
1 3- De-Morgan’s Theorems 1.The complement of a product of variables is equal to the sum of the complements of the variables. 2. The complement of a sum.
LECTURE 4 Logic Design. LOGIC DESIGN We already know that the language of the machine is binary – that is, sequences of 1’s and 0’s. But why is this?
Boolean Algebra and Computer Logic Mathematical Structures for Computer Science Chapter 7 Copyright © 2006 W.H. Freeman & Co.MSCS Slides Boolean Logic.
LOGIC CIRCUITLOGIC CIRCUIT. Goal To understand how digital a computer can work, at the lowest level. To understand what is possible and the limitations.
CHAPTER 3 Simplification of Boolean Functions
ECE 2110: Introduction to Digital Systems
Computer Organisation
Summary Half-Adder Basic rules of binary addition are performed by a half adder, which has two binary inputs (A and B) and two binary outputs (Carry out.
Digital Logic and Design
Karnaugh Maps (K-Maps)
CSE 311 Foundations of Computing I
Instructor: Alexander Stoytchev
ELL100: INTRODUCTION TO ELECTRICAL ENGG.
Optimization Algorithm
Chapter 3 Gate-level Minimization.
Minimization of Switching Functions
Overview Part 2 – Circuit Optimization
3-Variable K-map AB/C AB/C A’B’ A’B AB AB’
CMSC250 Fall 2018 Circuits 1 1.
Instructor: Alexander Stoytchev
Karnaugh maps Last time we saw applications of Boolean logic to circuit design. The basic Boolean operations are AND, OR and NOT. These operations can.
Chapter 11 (Part 2): Boolean Algebra
Presentation transcript:

Quine-McCluskey Computer Organization I 1 March 2010 © McQuain Introduction Recall that the procedure we've seen for forming a Boolean function from a truth table leads to a sum-of-products form. It's often the case that the sum-of-products form is not the simplest possible expression for the function: Clearly, the second form would require far less time to evaluate by hand, and far fewer gates if we were to implement it as a logic circuit. Fortunately, there are relatively straightforward algorithms for determining a minimal form for such an expression.

Quine-McCluskey Computer Organization I 2 March 2010 © McQuain Quine-McCluskey Method: Representation Represent each product in the function as a Boolean sequence, according to whether the variables or their negations occur in the product. Recall the expression for the carry bit in the full adder we examined earlier: ~A B Cin 011 A ~B Cin 101 A B ~Cin 110 A B C 111 We would represent the four product terms as:

Quine-McCluskey Computer Organization I 3 March 2010 © McQuain Quine-McCluskey Method: Combining Order the terms by the number of 1's in them; then form all the 3-term sequences you can by looking for 4-term sequences that differ in only one position. The key is the observation that, from the axioms of a Boolean algebra: This is sometimes known as the resolution rule. We may use this rule to identify equivalences that simplify the expression of a Boolean function. For example: ~w*~x*~y*z + ~w*~x*y*z = ~w*~x*(~y+y)*z = ~w*~x*1*z = ~w*~x*z or, more compactly, = 00-1 where the hyphen is just a placeholder indicating that the value of the third variable in this term doesn’t matter.

Quine-McCluskey Computer Organization I 4 March 2010 © McQuain Quine-McCluskey Method: Combining > 3, > 5, > 6, none Order the terms by the number of 1's in them; then form all the 2-term sequences you can by looking for 3-term sequences that differ in only one position; note that we only need to compare each sequence to ones that have exactly one more 1 in them. Label each term with its numeric value.

Quine-McCluskey Computer Organization I 5 March 2010 © McQuain Q-M Method: Selecting Prime Implicants ,7 -11 X X 5,7 1-1 X X 6,7 11- X X Next, determine a subset of the terms that cover all of the original terms: First, we look for columns that contain only one X. Those identify essential terms, which must be included in any solution. In this case, that applies to all of the terms we've found.

Quine-McCluskey Computer Organization I 6 March 2010 © McQuain Q-M Method: Forming the Solution -11 B * Cin 1-1 A * Cin 11- A * B Next, translate each of the included terms to the equivalent Boolean expression in terms of the original variables: Finally, add them up to obtain a minimized form of the original function: Cout = A * B + A * Cin + B * Cin

Quine-McCluskey Computer Organization I 7 March 2010 © McQuain Quine-McCluskey Method: Outline 1.Express each minterm in n variables by a bit string of length n with the i-th position filled by 1 if x_i occurs in the expression and 0 if ~x_i occurs. 2.Group the bit strings according to the number of 1's in them. 3.Use the Resolution Rule to combine as many n-variable terms into terms containing n- 1 variables as possible. 4.Continue applying the Resolution Rule to combine Boolean products into fewer variables as long as possible. 5.Find the smallest set of the resulting combined Boolean products, together with any of the original terms that were never combined with anything, so that the sum of these products represents the Boolean function.

Quine-McCluskey Computer Organization I 8 March 2010 © McQuain Quine-McCluskey Method: Representation Represent each product in the function as a Boolean sequence, according to whether the variables or their negations occur in the product. For the example on the previous slide, the seven products would be represented as: w x y ~z 1110 w ~x y z 1011 w ~x y ~z 1010 ~w x y z 0111 ~w x ~y z 0101 ~w ~x y z 0011 ~w ~x ~y z 0001

Quine-McCluskey Computer Organization I 9 March 2010 © McQuain Quine-McCluskey Method: Combining Order the terms by the number of 1's in them; then form all the 3-term sequences you can by looking for 4-term sequences that differ in only one position; note that we only need to compare each sequence to ones that have exactly one more 1 in them. Label each term with its numeric value. term F > 1, > 1, > 3, > 3, > 5, > 10, > 10, none none none

Quine-McCluskey Computer Organization I 10 March 2010 © McQuain Quine-McCluskey Method: Combining Repeat the process with the 3-term sequences, forming 2-term sequences: Second phase: , > 1,3,5, , > 1,3,5, (duplicate) 3, none 3, none 5, none 10, none 10, none

Quine-McCluskey Computer Organization I 11 March 2010 © McQuain Q-M Method: Selecting Prime Implicants Prime Coverage Map Implicants ,3,5, x x x x 1, x x 1, x 3, x x 3, x x 5, x x 10, x x 10, x x Essential for 14 or

Quine-McCluskey Computer Organization I 12 March 2010 © McQuain Quine-McCluskey Method: Formation Finally, translate the selected Boolean sequences back into the appropriate product terms: