Unit V Fault Diagnosis

Syllabus Logical Level Diagnosis – Diagnosis by UUT reduction – Fault Diagnosis for Combinational Circuits – Self-checking design – System Level Diagnosis.

What is Fault Diagnosis? A guess as to what’s wrong with a malfunctioning circuit Narrows the search for physical root cause Makes inferences based on observed behavior Usually based on the logical operation of the circuit ©2005 David Lavo

VLSI Fault Diagnosis (in One Slide) Defective Circuit Observed Behavior Tests Physical Analysis Diagnosis Algorithm Location or Fault Diagnosis

Two Types of Diagnosis Circuit Partitioning (“Effect-Cause” Diagnosis) Identify fault-free or possibly-faulty portions Identify suspect components, logic blocks, interconnects Model-Based Diagnosis (“Cause-Effect” Diagnosis) Assume one or more specific fault models Compare behavior to fault simulations ©2005 David Lavo

Circuit Partitioning Separate known-good portions of circuit from likely areas of failure Simplest method: identify failing flip-flops Tester can identify failing flops or outputs Input cone of logic is suspect Intersection of multiple cones is highly suspect Single clock pulse with scan can be used for sequential/functional fails ©2005 David Lavo

Back-Tracing Failures

Effect-Cause Diagnosis Reasoning based on observed behavior and expected (good-circuit) functions Commonly used at system and board-levels Tries to separate good and suspect areas Advantage: Simple and general Disadvantage: Not very precise, often gives no indication of defect mechanism ©2005 David Lavo

Cause-Effect Diagnosis Start from possible causes (fault models), compare to observed effects A simulator is used to predict behavior of the circuit in the presence of various faults Match prediction(s) against observed behavior Advantage: Implicates a mechanism as well as a location Disadvantage: Can be fooled by unmodeled defects ©2005 David Lavo

Cause-Effect Diagnosis 010001010100010101010 … Behavior Signature Defective Circuit Diagnosis Algorithm Comparison & Conclusion Tests Fault Simulator 010100110000101010100 … 101000100001011101100 … 010100010100011101100 … 000111000101010011110 … Candidate Signatures

Fault Diagnosis Overview Fault Dictionaries A fault dictionary is a database of the simulated responses for all faults in faultlist Used by some diagnosis algorithms for convenience: Fast: no simulation at time of diagnosis Self-contained: netlist, simulator, and test set not needed after dictionary creation Can be very large, however! ©2005 David Lavo Fault Diagnosis Overview

Diagnosis by UUT Reduction

Self-Checking Circuits Most important factors in designing a digital system: Speed, Cost and Correctness. Some systems used in 1. medical equipment used in ICUs, 2. aircraft control systems, 3. nuclear reactor control systems, 4. military systems and 5. computing systems used in space missions. High reliability is of the utmost importance. DSM technology: Signal Integrity problem

Self-Checking Circuits: Def: Error An incorrect output caused by a stuck-at fault. Def: Single Error An error that affects only a single component value Def: Multiple Error An error that affects multiple component values. The component value affected by an error may change form 0 to 1, or vice versa. Def: unidirectional errors When all components affected by a multiple error change their values monotonically.

Self-Checking Circuit

Self-checking scheme Self-Checking scheme: 1. a self-checking functional unit. 2. a self-checking checker. Self-Checking functional unit Inputs X Outputs Y ... ... ... ... Self-checking checker X: input code space Y: output code space Error signal

Self-Checking Circuits During the fault-free operation: a normal input will produce a normal output. If an incorrect output is produced due to a fault, the error should be detected by the self-checking checker.

Self-checking scheme Totally self-checking circuit: 1. no erroneous results go undetected and 2. any fault will be eventually detected. Partially self-checking circuits: 1. This approach is to restrict the set of faults for which the circuit has to be checked. 2. They are introduced to provide low-cost error detection. 3. They may be used in non-critical applications.

Self-Checking Checkers Code-disjoint: TSC Checker: With the code-disjoint feature, one may be able to test if the TSC checker is malfunction.

Self-checking scheme

Self-checking scheme Fault Secure(FS): code word input to a faulty circuit must not produce an incorrect code word output. Self-testing: a fault in a circuit must be detected by some input.

Self-checking scheme Fault Secure(FS): Self-testing:

Self-checking scheme Totally Self-Checking: Partially Self-Checking:

Self-checking scheme Fault-secure-only circuits: 1. No erroneous results go undetected. 2. However, it is possible that some fault can never be detected. Self-testing-only circuit: 1. Any fault can produce undetected errors for a short time. 2. However, there is a code word input that can detect the fault.